v1.7.9
What's Changed
- [rtl] cleanup main package file by @stnolting in #447
- [sw] rework intrinsic libraries by @stnolting in #448
- ✨ Add CFU R4-type instructions by @stnolting in #449
- 🐛 [rtl] core trap fixes by @stnolting in #450
- [sw] Remove B ISA extension intrinsic library by @stnolting in #451
- ✨ [CFU] add support for custom R5-type instructions by @stnolting in #452
- [rtl] instruction prefetch buffer (IPB) improvements by @stnolting in #455
- 🧪 [OCD] optimize firmware (park-loop) by @stnolting in #456
- 🐛 [rtl] fix iCache block error bug by @stnolting in #457
- 🐛 [rtl] fix MEPC value for instruction access faults by @stnolting in #458
- [rtl] mtval CSR is now r/w by @stnolting in #460
- [rt] SoC: rework r/w access logic and reset by @stnolting in #461
- [rtl] CPU: optimizations and cleanup by @stnolting in #462
Full Changelog: v1.7.8...v1.7.9