v1.10.0

What's Changed

• Add NEORV32 as Vivado IP by @stnolting in #894
• Cleanup SW library by @stnolting in #900
• Add back Dhrystone port by @stnolting in #901
• Update neorv32_sdi.vhd - Minor typo correction by @ucycg in #903
• Add COE and MEM file generator options by @stnolting in #904
• [FPU] prevent GCC from emitting fused multiply-add instructions by @stnolting in #905
• Add SLINK routing information ports by @stnolting in #908
• Make XIRQ trigger configuration programmable by @stnolting in #911
• Add HDL file list files by @stnolting in #909
• Relocate f files by @stnolting in #912
• Add variable-sized ports to Vivado IP block by @stnolting in #913
• Fix uncached/cached access priority by @stnolting in #915
• [xbus] access type identifier (tag signal) by @stnolting in #917
• [sw/lib] ⚠️ rework gpio_pin_set function by @stnolting in #921
• [rtl] TRNG: add data-available interrupt by @stnolting in #922
• Minor code cleanups by @stnolting in #925
• ✨ Add pre-configured Eclipse example project by @stnolting in #926

New Contributors

• @ucycg made their first contribution in #903

Full Changelog: v1.9.9...v1.10.0