v1.9.6

What's Changed

• Allow disabling certain PMP modes by @stnolting in #808
• [revert] remove page faults support by @stnolting in #809
• 🐛 Fix bug in CRT0 trap handler by @stnolting in #812
• ⚠️ Rework hardware performance monitor (HPM) events by @stnolting in #811
• 🧪 [makefile] pass CC_OPTS variable as define string by @stnolting in #813
• ⚠️ remove Smcntrpmf ISA extension by @stnolting in #814
• [sim] add simulation check to sw makefiles as target 'sim-check' by @umarcor in #817
• [SLINK] add AXI-stream-compatible "tlast" signals by @stnolting in #815
• [docs/userguide/simulating_the_processor] add admonition and recommend MARCH=rv32im to build hello_world by @umarcor in #819
• [ci] split SoftwareFrameworkTests from simple testbench simulation by @umarcor in #820
• 🐛 Fix write access to mip.firq CSR bits by @stnolting in #821
• [ci] test example hello_world as well by @umarcor in #822
• [fifo] fix (Vivado) synthesis issue by @stnolting in #827
• optimize FIFO component to improve mapping by @stnolting in #828
• Added dummy clocks for SLINK streams in AXI4-Lite wrapper by @robhancocksed in #831
• 🐛 fix atomic write/clear/set accesses of clear-only CSR bits by @stnolting in #829
• [sw] remove unused variable RISCV_TOOLCHAIN by @umarcor in #832
• 🐛 fix GPTMR threshold = 0 configuration by @stnolting in #834
• Small correction in user guide by @davidgussler in #835

New Contributors

• @robhancocksed made their first contribution in #831
• @davidgussler made their first contribution in #835

Full Changelog: v1.9.5...v1.9.6