v1.8.7

What's Changed

• demo_blink_led_asm bugfix by @vivi202 in #639
• Minor rtl edits, cleanups and optimizations by @stnolting in #641
• Minor rtl edits by @stnolting in #646
• ⚠️ Rework SoC bus system and memory map by @stnolting in #648
• ⚠️ Remove UART sim-mode's 32-bit dump by @stnolting in #650
• ✨ Add support for RISC-V A ISA extension (atomic memory access) by @stnolting in #651
• Minor rtl edits by @stnolting in #652
• [rtl] Optimize bus system and customization options by @stnolting in #653
• 🐛 fixing some LR/SC design flaws by @stnolting in #654

New Contributors

• @vivi202 made their first contribution in #639

Full Changelog: v1.8.6...v1.8.7