Merge pull request #1521 from riscv/Removing-type-from-wavedrom

Remove the color from wavedrom files (first batch)
riscv · Jul 11, 2024 · 58fb684 · 58fb684
2 parents 7d9f0ac + aa79463
commit 58fb684
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Showing 23 changed files with 201 additions and 201 deletions.
diff --git a/src/images/wavedrom/atomic-mem.adoc b/src/images/wavedrom/atomic-mem.adoc
@@ -3,13 +3,13 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 7, name: 'opcode',     type: 8, attr: ['7','AMO','AMO','AMO','AMO','AMO','AMO','AMO']},
-  {bits: 5, name: 'rd',         type: 2, attr: ['5','dest','dest','dest','dest','dest','dest','dest']},
-  {bits: 3, name: 'funct3',     type: 8, attr: ['3','width','width','width','width','width','width','width']},
-  {bits: 5, name: 'rs1',        type: 4, attr: ['5','addr','addr','addr','addr','addr','addr','addr']},
-  {bits: 5, name: 'rs2',        type: 4, attr: ['5','src','src','src','src','src','src','src']},
-  {bits: 1, name: 'rl',         type: 8, attr: ['1']},
-  {bits: 1, name: 'aq',         type: 8, attr: ['1']},
-  {bits: 6, name: 'funct5',     type: 8, attr: ['5','AMOSWAP.W/D', 'AMOADD.W/D', 'AMOAND.W/D', 'AMOOR.W/D', 'AMOXOR.W/D', 'AMOMAX[U].W/D','AMOMIN[U].W/D']},
+  {bits: 7, name: 'opcode',     attr: ['7','AMO','AMO','AMO','AMO','AMO','AMO','AMO']},
+  {bits: 5, name: 'rd',         attr: ['5','dest','dest','dest','dest','dest','dest','dest']},
+  {bits: 3, name: 'funct3',     attr: ['3','width','width','width','width','width','width','width']},
+  {bits: 5, name: 'rs1',        attr: ['5','addr','addr','addr','addr','addr','addr','addr']},
+  {bits: 5, name: 'rs2',        attr: ['5','src','src','src','src','src','src','src']},
+  {bits: 1, name: 'rl',         attr: ['1']},
+  {bits: 1, name: 'aq',         attr: ['1']},
+  {bits: 6, name: 'funct5',     attr: ['5','AMOSWAP.W/D', 'AMOADD.W/D', 'AMOAND.W/D', 'AMOOR.W/D', 'AMOXOR.W/D', 'AMOMAX[U].W/D','AMOMIN[U].W/D']},
 ], config: {bits: 32}}
 ....
diff --git a/src/images/wavedrom/c-andi.adoc b/src/images/wavedrom/c-andi.adoc
@@ -3,11 +3,11 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op',    type: 5, attr: ['2','C1'],},
-  {bits: 5, name: 'imm[4:0]',    type: 5, attr: ['5','imm[4:0]']},
-  {bits: 3, name: 'rd′/rs1′',    type: 5, attr: ['3','dest'],},
-  {bits: 2, name: 'funct2',     type: 5, attr: ['2','C.ANDI'],},
-  {bits: 1, name: 'imm[5]',    type: 1, attr: ['1','imm[5]'],},
-  {bits: 3, name: 'funct3', type: 5, attr: ['3','C.ANDI'],},
+  {bits: 2, name: 'op',    attr: ['2','C1'],},
+  {bits: 5, name: 'imm[4:0]',    attr: ['5','imm[4:0]']},
+  {bits: 3, name: 'rd′/rs1′',    attr: ['3','dest'],},
+  {bits: 2, name: 'funct2',     attr: ['2','C.ANDI'],},
+  {bits: 1, name: 'imm[5]',    attr: ['1','imm[5]'],},
+  {bits: 3, name: 'funct3', attr: ['3','C.ANDI'],},
 ]}
 ....
diff --git a/src/images/wavedrom/c-breakpoint-instr.adoc b/src/images/wavedrom/c-breakpoint-instr.adoc
@@ -4,8 +4,8 @@
 
 ....
 {reg: [
-  {bits: 2, name: 'op', type: 8, attr: ['2','C2'],},
-  {bits: 10, name: '0', type: 4, attr: ['10','0'],},
-  {bits: 4, name: 'funct4', type: 8, attr: ['4','C.EBREAK'],},
+  {bits: 2, name: 'op', attr: ['2','C2'],},
+  {bits: 10, name: '0', attr: ['10','0'],},
+  {bits: 4, name: 'funct4', attr: ['4','C.EBREAK'],},
 ], config: {bits: 16}}
 ....
diff --git a/src/images/wavedrom/c-cb-format-ls.adoc b/src/images/wavedrom/c-cb-format-ls.adoc
@@ -3,11 +3,11 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op', type: 8, attr: ['2','C1', 'C1']},
-  {bits: 5, name: 'imm', type: 3, attr: ['5','offset[7:6|2:1|5]', 'offset[7:6|2:1|5]']},
-  {bits: 3, name: 'rs1′',     type: 4, attr: ['3','src', 'src']},
-  {bits: 3, name: 'imm',    type: 3, attr: ['3','offset[8|4:3]', 'offset[8|4:3]'],},
-  {bits: 3, name: 'funct3',    type: 8, attr: ['3','C.BEQZ', 'C.BNEZ'],},
+  {bits: 2, name: 'op', attr: ['2','C1', 'C1']},
+  {bits: 5, name: 'imm', attr: ['5','offset[7:6|2:1|5]', 'offset[7:6|2:1|5]']},
+  {bits: 3, name: 'rs1′',     attr: ['3','src', 'src']},
+  {bits: 3, name: 'imm',    attr: ['3','offset[8|4:3]', 'offset[8|4:3]'],},
+  {bits: 3, name: 'funct3',    attr: ['3','C.BEQZ', 'C.BNEZ'],},
 ], config: {bits: 16}}
 ....
 
diff --git a/src/images/wavedrom/c-ci.adoc b/src/images/wavedrom/c-ci.adoc
@@ -3,11 +3,11 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op', type: 3, attr: ['2', 'C2']},
-  {bits: 5, name: 'shamt[4:0]',    type: 1, attr: ['5', 'shamt[4:0]']},
-  {bits: 5, name: 'rd/rs1',     type: 5, attr: ['5', 'dest != 0']},
-  {bits: 1, name: 'shamt[5]',    type: 5, attr: ['1', 'shamt[5]']},
-  {bits: 3, name: 'funct3',    type: 5, attr: ['3', 'C.SLLI']},
+  {bits: 2, name: 'op', attr: ['2', 'C2']},
+  {bits: 5, name: 'shamt[4:0]',    attr: ['5', 'shamt[4:0]']},
+  {bits: 5, name: 'rd/rs1',     attr: ['5', 'dest != 0']},
+  {bits: 1, name: 'shamt[5]',    attr: ['1', 'shamt[5]']},
+  {bits: 3, name: 'funct3',    attr: ['3', 'C.SLLI']},
 ]}
 ....
 
diff --git a/src/images/wavedrom/c-ciw.adoc b/src/images/wavedrom/c-ciw.adoc
@@ -3,10 +3,10 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op', type: 3, attr: ['2','C0'],},
-  {bits: 3, name: 'rd′',     type: 5, attr: ['3','dest'],},
-  {bits: 8, name: 'imm',    type: 5, attr: ['8','nzuimm[5:4|9:6|2|3]']},
-  {bits: 3, name: 'funct3',    type: 5, attr: ['3','C.ADDI4SPN']},
+  {bits: 2, name: 'op', attr: ['2','C0'],},
+  {bits: 3, name: 'rd′',     attr: ['3','dest'],},
+  {bits: 8, name: 'imm',    attr: ['8','nzuimm[5:4|9:6|2|3]']},
+  {bits: 3, name: 'funct3',    attr: ['3','C.ADDI4SPN']},
 ], config: {bits: 16}}
 ....
 
diff --git a/src/images/wavedrom/c-cj-format-ls.adoc b/src/images/wavedrom/c-cj-format-ls.adoc
@@ -13,9 +13,9 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op',     type: 8, attr: ['2','C1','C1']},
-  {bits: 11, name: 'imm',   type: 2, attr: ['11','offset[11|4|9:8|10|6|7|3:1|5]','offset[11|4|9:8|10|6|7|3:1|5]']},
-  {bits: 3, name: 'funct3', type: 8, attr: ['3','C.J','C.JAL']},
+  {bits: 2, name: 'op',     attr: ['2','C1','C1']},
+  {bits: 11, name: 'imm',   attr: ['11','offset[11|4|9:8|10|6|7|3:1|5]','offset[11|4|9:8|10|6|7|3:1|5]']},
+  {bits: 3, name: 'funct3', attr: ['3','C.J','C.JAL']},
 ], config: {bits: 16}}
 ....
 

diff --git a/src/images/wavedrom/c-cr-format-ls.adoc b/src/images/wavedrom/c-cr-format-ls.adoc
@@ -3,10 +3,10 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op', type: 8, attr: ['2','C2', 'C2']},
-  {bits: 5, name: 'rs2',     type: 4, attr: ['5','0', '0']},
-  {bits: 5, name: 'rs1',     type: 4, attr: ['5','src≠0', 'src≠0']},
-  {bits: 4, name: 'funct4',  type: 8, attr: ['4','C.JR', 'C.JALR']},
+  {bits: 2, name: 'op', attr: ['2','C2', 'C2']},
+  {bits: 5, name: 'rs2',     attr: ['5','0', '0']},
+  {bits: 5, name: 'rs1',     attr: ['5','src≠0', 'src≠0']},
+  {bits: 4, name: 'funct4',  attr: ['4','C.JR', 'C.JALR']},
 ], config: {bits: 16}}
 ....
 
diff --git a/src/images/wavedrom/c-cs-format-ls.adoc b/src/images/wavedrom/c-cs-format-ls.adoc
@@ -4,12 +4,12 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op',     type: 8, attr: ['2', 'C0','C0','C0','C0','C0']},
-  {bits: 3, name: 'rs2ʹ',   type: 3, attr: ['3', 'src','src','src','src','src']},
-  {bits: 2, name: 'imm',    type: 2, attr: ['2', 'offset[2|6]','offset[7:6]','offset[7:6]','offset[2|6]','offset[7:6]']},
-  {bits: 3, name: 'rs1ʹ',   type: 3, attr: ['3', 'base','base','base','base','base']},
-  {bits: 3, name: 'imm',    type: 3, attr: ['3', 'offset[5:3]','offset[5:3]','offset[5|4|8]','offset[5:3]','offset[5:3]']},
-  {bits: 3, name: 'funct3', type: 8, attr: ['3', 'C.SW','C.SD','C.SQ','C.FSW','C.FSD']},
+  {bits: 2, name: 'op',     attr: ['2', 'C0','C0','C0','C0','C0']},
+  {bits: 3, name: 'rs2ʹ',   attr: ['3', 'src','src','src','src','src']},
+  {bits: 2, name: 'imm',    attr: ['2', 'offset[2|6]','offset[7:6]','offset[7:6]','offset[2|6]','offset[7:6]']},
+  {bits: 3, name: 'rs1ʹ',   attr: ['3', 'base','base','base','base','base']},
+  {bits: 3, name: 'imm',    attr: ['3', 'offset[5:3]','offset[5:3]','offset[5|4|8]','offset[5:3]','offset[5:3]']},
+  {bits: 3, name: 'funct3', attr: ['3', 'C.SW','C.SD','C.SQ','C.FSW','C.FSD']},
 ], config: {bits: 16}}
 ....
 

diff --git a/src/images/wavedrom/c-def-illegal-inst.adoc b/src/images/wavedrom/c-def-illegal-inst.adoc
@@ -4,10 +4,10 @@
 
 ....
 {reg: [
-  {bits: 2, name: '0', type: 8, attr: ['2','0'],},
-  {bits: 5, name: '0', type: 4, attr: ['5','0'],},
-  {bits: 5, name: '0', type: 8, attr: ['5','0'],},
-  {bits: 1, name: '0', type: 8, attr: ['1','0'],},
-  {bits: 3, name: '0', type: 8, attr: ['3','0'],},
+  {bits: 2, name: '0', attr: ['2','0'],},
+  {bits: 5, name: '0', attr: ['5','0'],},
+  {bits: 5, name: '0', attr: ['5','0'],},
+  {bits: 1, name: '0', attr: ['1','0'],},
+  {bits: 3, name: '0', attr: ['3','0'],},
 ], config: {bits: 16}}
 ....
diff --git a/src/images/wavedrom/c-int-reg-immed.adoc b/src/images/wavedrom/c-int-reg-immed.adoc
@@ -3,10 +3,10 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op',        type: 3, attr: ['2','C1', 'C1', 'C1']},
-  {bits: 5, name: 'imm[4:]',  type: 1, attr: ['5','nzimm[4:0]', 'imm[4:0]', 'nzimm[4|6|8:7|5]']},
-  {bits: 5, name: 'rd/rs1',    type: 5, attr: ['5','dest != 0', 'dest != 0', '2']},
-  {bits: 1, name: 'imm[5]',    type: 5, attr: ['1','nzimm[5]', 'imm[5]', 'nzimm[9]']},
-  {bits: 3, name: 'funct3',    type: 5, attr: ['3','C.ADDI', 'C.ADDIW', 'C.ADDI16SP']},
+  {bits: 2, name: 'op',        attr: ['2','C1', 'C1', 'C1']},
+  {bits: 5, name: 'imm[4:]',  attr: ['5','nzimm[4:0]', 'imm[4:0]', 'nzimm[4|6|8:7|5]']},
+  {bits: 5, name: 'rd/rs1',    attr: ['5','dest != 0', 'dest != 0', '2']},
+  {bits: 1, name: 'imm[5]',    attr: ['1','nzimm[5]', 'imm[5]', 'nzimm[9]']},
+  {bits: 3, name: 'funct3',    attr: ['3','C.ADDI', 'C.ADDIW', 'C.ADDI16SP']},
 ], config: {bits: 16}}
 ....
diff --git a/src/images/wavedrom/c-int-reg-to-reg-ca-format.adoc b/src/images/wavedrom/c-int-reg-to-reg-ca-format.adoc
@@ -4,10 +4,10 @@
 
 ....
 {reg: [
-  {bits: 2, name: 'op',     type: 8, attr: ['2', 'C1', 'C1', 'C1', 'C1', 'C1', 'C1'],},
-  {bits: 3, name: 'rs2′',    type: 4, attr: ['3', 'src', 'src', 'src', 'src', 'src', 'src'],},
-  {bits: 2, name: 'funct2', type: 8, attr: ['2', 'C.AND', 'C.OR', 'C.XOR', 'C.SUB', 'C.ADDW', 'C.SUBW'],},
-  {bits: 3, name: 'rd′/rs1′', type: 7, attr: ['3', 'dest', 'dest', 'dest', 'dest', 'dest', 'dest'],},
-  {bits: 6, name: 'funct6', type: 8, attr: ['6', 'C.AND', 'C.OR', 'C.XOR', 'C.SUB', 'C.ADDW', 'C.SUBW'],},
+  {bits: 2, name: 'op',     attr: ['2', 'C1', 'C1', 'C1', 'C1', 'C1', 'C1'],},
+  {bits: 3, name: 'rs2′',    attr: ['3', 'src', 'src', 'src', 'src', 'src', 'src'],},
+  {bits: 2, name: 'funct2', attr: ['2', 'C.AND', 'C.OR', 'C.XOR', 'C.SUB', 'C.ADDW', 'C.SUBW'],},
+  {bits: 3, name: 'rd′/rs1′', attr: ['3', 'dest', 'dest', 'dest', 'dest', 'dest', 'dest'],},
+  {bits: 6, name: 'funct6', attr: ['6', 'C.AND', 'C.OR', 'C.XOR', 'C.SUB', 'C.ADDW', 'C.SUBW'],},
 ]} 
 ....
diff --git a/src/images/wavedrom/c-int-reg-to-reg-cr-format.adoc b/src/images/wavedrom/c-int-reg-to-reg-cr-format.adoc
@@ -4,9 +4,9 @@
 
 ....
 {reg: [
-  {bits: 2, name: 'op',     type: 8, attr: ['2', 'C2', 'C2'],},
-  {bits: 5, name: 'rs2',    type: 4, attr: ['5', 'src≠0', 'src≠0'],},
-  {bits: 5, name: 'rd/rs1', type: 7, attr: ['5', 'dest≠0', 'dest≠0'],},
-  {bits: 4, name: 'funct4', type: 8, attr: ['4', 'C.MV', 'C.ADD'],},
+  {bits: 2, name: 'op',     attr: ['2', 'C2', 'C2'],},
+  {bits: 5, name: 'rs2',    attr: ['5', 'src≠0', 'src≠0'],},
+  {bits: 5, name: 'rd/rs1', attr: ['5', 'dest≠0', 'dest≠0'],},
+  {bits: 4, name: 'funct4', attr: ['4', 'C.MV', 'C.ADD'],},
 ], config: {bits: 16}} 
 ....
diff --git a/src/images/wavedrom/c-integer-const-gen.adoc b/src/images/wavedrom/c-integer-const-gen.adoc
@@ -3,11 +3,11 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op', type: 3, attr: ['2','C1', 'C1']},
-  {bits: 5, name: 'imm[4:0]',    type: 1, attr: ['5','imm[4:0]','imm[16:12]']},
-  {bits: 5, name: 'rd',     type: 5, attr: ['5','dest != 0', 'dest != {0, 2}']},
-  {bits: 1, name: 'imm[5]',    type: 5, attr: ['1','imm[5]', 'nzimm[17]'],},
-  {bits: 3, name: 'funct3',    type: 5, attr: ['3','C.LI', 'C.LUI'],},
+  {bits: 2, name: 'op', attr: ['2','C1', 'C1']},
+  {bits: 5, name: 'imm[4:0]',    attr: ['5','imm[4:0]','imm[16:12]']},
+  {bits: 5, name: 'rd',     attr: ['5','dest != 0', 'dest != {0, 2}']},
+  {bits: 1, name: 'imm[5]',    attr: ['1','imm[5]', 'nzimm[17]'],},
+  {bits: 3, name: 'funct3',    attr: ['3','C.LI', 'C.LUI'],},
 ], config: {bits: 16}}
 ....
 
diff --git a/src/images/wavedrom/c-mop.adoc b/src/images/wavedrom/c-mop.adoc
@@ -1,11 +1,11 @@
 [wavedrom, ,svg]
 ....
 {reg:[
-    { bits:  2, name: 0x1, type: 8 },
+    { bits:  2, name: 0x1 },
     { bits:  5, name: 0x0 },
-    { bits:  1, name: 0x1, type: 4 },
-    { bits:  3, name: 'n[3:1]', type: 4 },
-    { bits:  1, name: 0x0, type: 4 },
+    { bits:  1, name: 0x1 },
+    { bits:  3, name: 'n[3:1]' },
+    { bits:  1, name: 0x0 },
     { bits:  1, name: 0x0 },
     { bits:  3, name: 0x3 },
 ]}

diff --git a/src/images/wavedrom/c-nop-instr.adoc b/src/images/wavedrom/c-nop-instr.adoc
@@ -4,10 +4,10 @@
 
 ....
 {reg: [
-  {bits: 2, name: 'op', type: 8, attr: ['2','C1'],},
-  {bits: 5, name: 'imm[4:0]', type: 4, attr: ['5','0'],},
-  {bits: 5, name: 'rd/rs1', type: 8, attr: ['5','0'],},
-  {bits: 1, name: 'imm[5]', type: 8, attr: ['1','0'],},
-  {bits: 3, name: 'funct3', type: 8, attr: ['3','C.NOP'],},
+  {bits: 2, name: 'op', attr: ['2','C1'],},
+  {bits: 5, name: 'imm[4:0]', attr: ['5','0'],},
+  {bits: 5, name: 'rd/rs1', attr: ['5','0'],},
+  {bits: 1, name: 'imm[5]', attr: ['1','0'],},
+  {bits: 3, name: 'funct3', attr: ['3','C.NOP'],},
 ]}
 ....
diff --git a/src/images/wavedrom/c-sp-load-store-css.adoc b/src/images/wavedrom/c-sp-load-store-css.adoc
@@ -3,10 +3,10 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op',     type: 8, attr: ['2','C2','C2','C2','C2','C2']},
-  {bits: 5, name: 'rs2',    type: 4, attr: ['5','src', 'src', 'src', 'src', 'src']},
-  {bits: 6, name: 'imm',    type: 3, attr: ['6','offset[5:2|7:6]', 'offset[5:3|8:6]', 'offset[5:4|9:6]', 'offset[5:2|7:6]','offset[5:3|8:6]']},
-  {bits: 3, name: 'funct3', type: 8, attr: ['3','C.SWSP', 'C.SDSP', 'C.SQSP', 'C.FSWSP', 'C.FSDSP']},
+  {bits: 2, name: 'op',     attr: ['2','C2','C2','C2','C2','C2']},
+  {bits: 5, name: 'rs2',    attr: ['5','src', 'src', 'src', 'src', 'src']},
+  {bits: 6, name: 'imm',    attr: ['6','offset[5:2|7:6]', 'offset[5:3|8:6]', 'offset[5:4|9:6]', 'offset[5:2|7:6]','offset[5:3|8:6]']},
+  {bits: 3, name: 'funct3', attr: ['3','C.SWSP', 'C.SDSP', 'C.SQSP', 'C.FSWSP', 'C.FSDSP']},
 ], config: {bits: 16}}
 ....
 

diff --git a/src/images/wavedrom/c-sp-load-store.adoc b/src/images/wavedrom/c-sp-load-store.adoc
@@ -4,11 +4,11 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op',     type: 8, attr: ['2','C2','C2','C2','C2','C2']},
-  {bits: 5, name: 'imm',    type: 5, attr: ['5','offset[4:2|7:6]', 'offset[4:3|8:6]', 'offset[4|9:6]', 'offset[4:2|7:6]', 'offset[4:3|8:6]']},
-  {bits: 5, name: 'rd',     type: 5, attr: ['5','dest≠0', 'dest≠0', 'dest≠0', 'dest', 'dest']},
-  {bits: 1, name: 'imm',    type: 1, attr: ['1','offset[5]','offset[5]','offset[5]','offset[5]','offset[5]']},
-  {bits: 3, name: 'funct3', type: 3, attr: ['3','C.LWSP', 'C.LDSP', 'C.LQSP', 'C.FLWSP', 'C.FLDSP']},
+  {bits: 2, name: 'op',     attr: ['2','C2','C2','C2','C2','C2']},
+  {bits: 5, name: 'imm',    attr: ['5','offset[4:2|7:6]', 'offset[4:3|8:6]', 'offset[4|9:6]', 'offset[4:2|7:6]', 'offset[4:3|8:6]']},
+  {bits: 5, name: 'rd',     attr: ['5','dest≠0', 'dest≠0', 'dest≠0', 'dest', 'dest']},
+  {bits: 1, name: 'imm',    attr: ['1','offset[5]','offset[5]','offset[5]','offset[5]','offset[5]']},
+  {bits: 3, name: 'funct3', attr: ['3','C.LWSP', 'C.LDSP', 'C.LQSP', 'C.FLWSP', 'C.FLDSP']},
 ], config: {bits: 16}}
 ....
 

diff --git a/src/images/wavedrom/c-srli-srai.adoc b/src/images/wavedrom/c-srli-srai.adoc
@@ -3,11 +3,11 @@
 [wavedrom, ,svg]
 ....
 {reg: [
-  {bits: 2, name: 'op', type: 3, attr: ['2','C1', 'C1'],},
-  {bits: 5, name: 'shamt[4:0]',    type: 1, attr: ['5','shamt[4:0]', 'shamt[4:0]'],},
-  {bits: 3, name: 'rd′/rs1′',     type: 5, attr: ['3','dest', 'dest'],},
-  {bits: 2, name: 'funct2',    type: 5, attr: ['2','C.SRLI', 'C.SRAI'],},
-  {bits: 1, name: 'shamt[5]',    type: 5, attr: ['1','shamt[5]', 'shamt[5]'],},
-  {bits: 3, name: 'funct3',    type: 5, attr: ['3','C.SRLI', 'C.SRAI'],},
+  {bits: 2, name: 'op', attr: ['2','C1', 'C1'],},
+  {bits: 5, name: 'shamt[4:0]',    attr: ['5','shamt[4:0]', 'shamt[4:0]'],},
+  {bits: 3, name: 'rd′/rs1′',     attr: ['3','dest', 'dest'],},
+  {bits: 2, name: 'funct2',    attr: ['2','C.SRLI', 'C.SRAI'],},
+  {bits: 1, name: 'shamt[5]',    attr: ['1','shamt[5]', 'shamt[5]'],},
+  {bits: 3, name: 'funct3',    attr: ['3','C.SRLI', 'C.SRAI'],},
 ]}
 ....