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Merge pull request #1519 from riscv/fix-1510
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Move non-normative note to more logical position
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aswaterman authored Jul 11, 2024
2 parents 14a3c79 + 4d5822a commit 7d9f0ac
Showing 1 changed file with 7 additions and 7 deletions.
14 changes: 7 additions & 7 deletions src/supervisor.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -1110,13 +1110,6 @@ If the value held in _rs1_ is not a valid virtual address, then the
SFENCE.VMA instruction has no effect. No exception is raised in this
case.

When __rs2__≠``x0``, bits SXLEN-1:ASIDMAX of the value held
in _rs2_ are reserved for future standard use. Until their use is
defined by a standard extension, they should be zeroed by software and
ignored by current implementations. Furthermore, if
ASIDLEN<ASIDMAX, the implementation shall ignore bits
ASIDMAX-1:ASIDLEN of the value held in _rs2_.

[NOTE]
====
It is always legal to over-fence, e.g., by fencing only based on a
Expand All @@ -1128,6 +1121,13 @@ choice not to raise an exception when an invalid virtual address is held
in _rs1_ facilitates this type of simplification.
====

When __rs2__&#8800;``x0``, bits SXLEN-1:ASIDMAX of the value held
in _rs2_ are reserved for future standard use. Until their use is
defined by a standard extension, they should be zeroed by software and
ignored by current implementations. Furthermore, if
ASIDLEN<ASIDMAX, the implementation shall ignore bits
ASIDMAX-1:ASIDLEN of the value held in _rs2_.

An implicit read of the memory-management data structures may return any
translation for an address that was valid at any time since the most
recent SFENCE.VMA that subsumes that address. The ordering implied by
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