K10

Architecture specific notes for AMD K10

Performance groups

The following performance groups are partly based on the report by AMD fellow Paul J. Drongowski: Basic Performance Measurements for AMD Athlon™ 64, AMD Opteron™ and AMD Phenom™ Processors.

AMD K10 Performance groups

Events

The input file for the events on AMD K10 can be found here.

Counters

• Core-local counters
  • General-purpose counters

Core-local counters

General-purpose counters

The AMD® K10 microarchitecture provides 4 general-purpose counters consiting of a config and a counter register.

Counter and events

Counter name	Event name
PMC0	*
PMC1	*
PMC2	*
PMC3	*

Available Options

Option	Argument	Description	Comment
edgedetect	N	Set bit 18 in config register
kernel	N	Set bit 17 in config register
threshold	8 bit hex value	Set bits 24-31 in config register	The value for threshold can range between 0x0 and 0x3
invert	N	Set bit 23 in config register