Verilog implementation of SAP-1 computer architecture
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Updated
Sep 12, 2021 - Verilog
Verilog implementation of SAP-1 computer architecture
The Simple-As-Possible (SAP)-1 computer is a very basic model of a microprocessor explained by Albert Paul Malvino. The SAP-1 design contains the basic necessities for a functional Microprocessor. Its primary purpose is to develop a basic understanding of how a microprocessor works, interacts with memory and other parts of the system like input …
A C++ Implementation of X-Bit Computer SAP-X Architecture Virtualization
Project files in KiCAD for an under design 8-Bit Computer or CPU (or something like that)
Designed and implemented a functional 8-bit CPU system in Logisim, including ALU, control unit, and memory.
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