🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
-
Updated
Aug 20, 2022 - VHDL
🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
This project aims to test how fast you can respond after seeing a visual stimulus or rather hand-eye coordination.
A vhdl device to generate random numbers LFSR
Add a description, image, and links to the lfsr topic page so that developers can more easily learn about it.
To associate your repository with the lfsr topic, visit your repo's landing page and select "manage topics."