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Update neorv32_sdi.vhd - Minor typo correction #903

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May 16, 2024
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3 changes: 2 additions & 1 deletion rtl/core/neorv32_sdi.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -211,7 +211,8 @@ begin
FIFO_DEPTH => RTX_FIFO, -- number of fifo entries; has to be a power of two; min 1
FIFO_WIDTH => 8, -- size of data elements in fifo (32-bit only for simulation)
FIFO_RSYNC => true, -- sync read
FIFO_SAFE => true -- safe access
FIFO_SAFE => true, -- safe access
FULL_RESET => false -- no HW reset, try to infer BRAM
)
port map (
-- control --
Expand Down