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[XIP] add clock divider for fine-tuning #731

Merged
merged 5 commits into from
Nov 18, 2023
Merged

[XIP] add clock divider for fine-tuning #731

merged 5 commits into from
Nov 18, 2023

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stnolting
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This PR adds a 4-bit clock divider XPI_CTRL_CDIVx to the XIP's SPI interface allowing fine-tuning of the SPI clock (similar to the SPI module configuration options).

f_spi = f_main / (2 * clock_prescaler * (1 + XPI_CTRL_CDIVx))

@stnolting stnolting added enhancement New feature or request HW hardware-related labels Nov 18, 2023
@stnolting stnolting self-assigned this Nov 18, 2023
@stnolting stnolting marked this pull request as ready for review November 18, 2023 17:53
@stnolting stnolting merged commit 5a827ea into main Nov 18, 2023
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@stnolting stnolting deleted the xip_clock_tune branch November 18, 2023 22:45
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