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Add cyclone2 legacy mem-files #198

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merged 6 commits into from
Nov 4, 2021
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This PR adds optional alternative architecture-only files for the processor-internal IMEM and DMEM (#197).

The new files do not use any device-specific primitives or macros - they just use a different HDL style to allow legacy Quartus version to successfully infer block RAM resources.

these files DO NOT use any FPGA-specific primitves or macros at all! - just a different HDL style
@stnolting stnolting added the HW hardware-related label Nov 3, 2021
@stnolting stnolting marked this pull request as ready for review November 4, 2021 00:00
@stnolting stnolting linked an issue Nov 4, 2021 that may be closed by this pull request
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Just a few minor issues with the (english) language. Otherwise, LGTM!

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@stnolting stnolting merged commit e50d131 into master Nov 4, 2021
@stnolting stnolting deleted the add_cyclone2_legacy_memfiles branch November 4, 2021 11:47
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Instances of uninferred RAM logic
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