Mor1kx v5.1.1

This is a minor feature and bug fix release

What's Changed

• Add parameters to the synth job by @stffrdhrn in #144
• Make FPCSR is R/W accessible for both user- and supervisor- modes. by @stffrdhrn in #148
• Fix #146 - Revert "dcache: Allow writing during write_pending" by @stffrdhrn in #147

Full Changelog: v5.1...v5.1.1

Mor1kx v5.1

It's about time to create a new release. This includes:

• License updated to CERN OHL-W V2
• FPU support for unordered comparison operations
• Support for sign extension instructions
• Added formal verification
• Support for configurable branch predictor algorithms (SIMPLE, GSHARE)
• Fixed issues
  • #66 - ram inferring
  • #69 - 0 shadow registers
  • #110 - ff1 validation
  • #117 - broken IMMU when DMMU siabled
  • #122 - broken back to back spr writes
  • #127 - spr bus ack