riscv64: Add support for load+extend patterns
#8765
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RISC-V doesen't have sinkable loads per se, but the regular load instructions support sign / zero extending the loaded values. We model those here as a sinkable load on the extend instruction.
afonso360
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| ;; Extract a sinkable instruction from a value operand. | ||
| (decl sinkable_inst (Inst) Value) | ||
| (extern extractor sinkable_inst sinkable_inst) | ||
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| ;; Matches a sinkable load. | ||
| (decl sinkable_load (Inst Type MemFlags Value Offset32) Value) | ||
| (extractor (sinkable_load inst ty flags addr offset) | ||
| (and | ||
| (load flags addr offset) | ||
| (sinkable_inst (has_type ty inst)))) |
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Maybe add a comment here about the extend(load()) use case and the asterisk around "sinkable" that you added in the PR description? That seems like good context to have when reading this code.
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This commit adds support for merging a load with a `{u,s}extend` instruction. On AArch64 the load instructions already do this by default, so we can just emit the regular loads.
See also bytecodealliance#8765 that does a similar thing for RISC-V
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This commit adds support for merging a load with a `{u,s}extend` instruction. On AArch64 the load instructions already do this by default, so we can just emit the regular loads.
See also bytecodealliance#8765 that does a similar thing for RISC-V
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This commit adds support for merging a load with a `{u,s}extend` instruction. On AArch64 the load instructions already do this by default, so we can just emit the regular loads.
See also #8765 that does a similar thing for RISC-V
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👋 Hey,
This PR adds support for merging
{s,u}extendinstructions into a precedingload.RISC-V doesn't have sinkable loads per se, but the regular load instructions sign / zero extend the loaded values by default. So here we model that by pretending that that is a sinkable load on an extend instruction.
This PR is also a part of #6056. I'm working on that, the first step is to support generating the same code with
load+extendon all backends as we currently do with the specialized{u,s}loadNNinstructions.