LFSR behavioural model in Verilog.
for longest 5-bits repeating sequence, tapping done at 2nd and 5th flip-flop.
Coded in EDAplayground.
Link to simulator:https://www.edaplayground.com/x/69Q3
LFSR behavioural model in Verilog.
for longest 5-bits repeating sequence, tapping done at 2nd and 5th flip-flop.
Coded in EDAplayground.
Link to simulator:https://www.edaplayground.com/x/69Q3