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@vlsi-lab

VLSI lab - PoliTO

VLSI lab @ Dipartimento di Elettronica e Telecomunicazioni (DET) in Politecnico di Torino

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  1. len5 len5 Public

    LEN5 is a coonfigurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.

    SystemVerilog 7 3

  2. MARLIN MARLIN Public

    MARLIN: a Co-design Methodology for Approximate ReconfigurabLe Inference of Neural Networks at the Edge

    Python 3

  3. TRNG TRNG Public

    Python 3

  4. keccak_integration keccak_integration Public

    1

  5. ntt_intt_kyber ntt_intt_kyber Public

    Assembly 1

  6. pulp-runtime pulp-runtime Public

    Forked from pulp-platform/pulp-runtime

    Simple runtime for Pulp platforms

    C

Repositories

Showing 10 of 12 repositories
  • TRNG Public
    vlsi-lab/TRNG’s past year of commit activity
    Python 3 0 0 0 Updated Sep 16, 2024
  • ATHOS_doc Public
    vlsi-lab/ATHOS_doc’s past year of commit activity
    0 0 0 0 Updated Sep 10, 2024
  • MARLIN Public

    MARLIN: a Co-design Methodology for Approximate ReconfigurabLe Inference of Neural Networks at the Edge

    vlsi-lab/MARLIN’s past year of commit activity
    Python 3 MIT 0 0 0 Updated Aug 21, 2024
  • keccak_integration Public
    vlsi-lab/keccak_integration’s past year of commit activity
    1 0 0 0 Updated May 8, 2024
  • ntt_intt_kyber Public
    vlsi-lab/ntt_intt_kyber’s past year of commit activity
    Assembly 1 0 0 0 Updated May 8, 2024
  • len5 Public

    LEN5 is a coonfigurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.

    vlsi-lab/len5’s past year of commit activity
    SystemVerilog 7 3 0 1 Updated May 8, 2024
  • x-heep Public Forked from esl-epfl/x-heep

    eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V

    vlsi-lab/x-heep’s past year of commit activity
    C 0 75 0 0 Updated Feb 17, 2024
  • cv32e40x Public Forked from openhwgroup/cv32e40x

    4 stage, in-order, compute RISC-V core based on the CV32E40P

    vlsi-lab/cv32e40x’s past year of commit activity
    SystemVerilog 0 49 0 0 Updated Nov 13, 2023
  • pulp_soc Public Forked from pulp-platform/pulp_soc

    pulp_soc is the core building component of PULP based SoCs

    vlsi-lab/pulp_soc’s past year of commit activity
    Shell 0 83 0 0 Updated Sep 20, 2023
  • pulpissimo Public Forked from pulp-platform/pulpissimo

    This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

    vlsi-lab/pulpissimo’s past year of commit activity
    SystemVerilog 0 167 0 0 Updated Sep 20, 2023
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