⚡️ Improve TFT DMA for STM32 (MarlinFirmware#25359)

thinkyhead · May 16, 2023 · 25a465b · 25a465b
1 parent 98e9bbc
commit 25a465b
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Showing 25 changed files with 198 additions and 167 deletions.
diff --git a/Marlin/Configuration.h b/Marlin/Configuration.h
@@ -3292,11 +3292,11 @@
    */
   #define TFT_FONT  NOTOSANS
 
-  //#define TFT_SHARED_SPI   // SPI is shared between TFT display and other devices. Disable async data transfer
+  //#define TFT_SHARED_IO   // I/O is shared between TFT display and other devices. Disable async data transfer.
 #endif
 
 #if ENABLED(TFT_LVGL_UI)
-  //#define MKS_WIFI_MODULE  // MKS WiFi module
+  //#define MKS_WIFI_MODULE // MKS WiFi module
 #endif
 
 /**

diff --git a/Marlin/src/HAL/LPC1768/tft/tft_spi.cpp b/Marlin/src/HAL/LPC1768/tft/tft_spi.cpp
@@ -139,7 +139,7 @@ void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Coun
   DataTransferBegin(DATASIZE_16BIT);
   SPIx.dmaSendAsync(Data, Count, MemoryIncrease);
 
-  TERN_(TFT_SHARED_SPI, while (isBusy()));
+  TERN_(TFT_SHARED_IO, while (isBusy()));
 }
 
 #endif // HAS_SPI_TFT
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
@@ -100,11 +100,11 @@ void TFT_FSMC::Init() {
 
   HAL_SRAM_Init(&SRAMx, &Timing, &ExtTiming);
 
-  __HAL_RCC_DMA2_CLK_ENABLE();
-
   #ifdef STM32F1xx
-    DMAtx.Instance = DMA2_Channel1;
+    __HAL_RCC_DMA1_CLK_ENABLE();
+    DMAtx.Instance = DMA1_Channel1;
   #elif defined(STM32F4xx)
+    __HAL_RCC_DMA2_CLK_ENABLE();
     DMAtx.Instance = DMA2_Stream0;
     DMAtx.Init.Channel = DMA_CHANNEL_0;
     DMAtx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
@@ -174,6 +174,8 @@ void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Cou
   DMAtx.Init.PeriphInc = MemoryIncrease;
   HAL_DMA_Init(&DMAtx);
   HAL_DMA_Start(&DMAtx, (uint32_t)Data, (uint32_t)&(LCD->RAM), Count);
+
+  TERN_(TFT_SHARED_IO, while (isBusy()));
 }
 
 void TFT_FSMC::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {

diff --git a/Marlin/src/HAL/STM32/tft/tft_spi.cpp b/Marlin/src/HAL/STM32/tft/tft_spi.cpp
@@ -242,7 +242,7 @@ void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Coun
 
   SET_BIT(SPIx.Instance->CR2, SPI_CR2_TXDMAEN);   // Enable Tx DMA Request
 
-  TERN_(TFT_SHARED_SPI, while (isBusy()));
+  TERN_(TFT_SHARED_IO, while (isBusy()));
 }
 
 
@@ -261,6 +261,7 @@ void TFT_SPI::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count)
   SET_BIT(SPIx.Instance->CR2, SPI_CR2_TXDMAEN);   // Enable Tx DMA Request
 
   HAL_DMA_PollForTransfer(&DMAtx, HAL_DMA_FULL_TRANSFER, HAL_MAX_DELAY);
+  while ( __HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_BSY)) {}
   Abort();
 }
 

diff --git a/Marlin/src/HAL/STM32F1/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32F1/tft/tft_fsmc.cpp
@@ -245,6 +245,8 @@ void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Cou
   dma_set_num_transfers(FSMC_DMA_DEV, FSMC_DMA_CHANNEL, Count);
   dma_clear_isr_bits(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
   dma_enable(FSMC_DMA_DEV, FSMC_DMA_CHANNEL);
+
+  TERN_(TFT_SHARED_IO, while (isBusy()));
 }
 
 void TFT_FSMC::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {

diff --git a/Marlin/src/HAL/STM32F1/tft/tft_fsmc.h b/Marlin/src/HAL/STM32F1/tft/tft_fsmc.h
@@ -30,6 +30,13 @@
 
 #include <libmaple/dma.h>
 
+#ifndef FSMC_DMA_DEV
+  #define FSMC_DMA_DEV      DMA2
+#endif
+#ifndef FSMC_DMA_CHANNEL
+  #define FSMC_DMA_CHANNEL  DMA_CH5
+#endif
+
 #define DATASIZE_8BIT  DMA_SIZE_8BITS
 #define DATASIZE_16BIT DMA_SIZE_16BITS
 #define TFT_IO_DRIVER  TFT_FSMC

diff --git a/Marlin/src/HAL/STM32F1/tft/tft_spi.cpp b/Marlin/src/HAL/STM32F1/tft/tft_spi.cpp
@@ -154,7 +154,7 @@ void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Coun
   DataTransferBegin();
   SPIx.dmaSendAsync(Data, Count, MemoryIncrease == DMA_MINC_ENABLE);
 
-  TERN_(TFT_SHARED_SPI, while (isBusy()));
+  TERN_(TFT_SHARED_IO, while (isBusy()));
 }
 
 void TFT_SPI::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {

diff --git a/Marlin/src/inc/SanityCheck.h b/Marlin/src/inc/SanityCheck.h
@@ -698,6 +698,8 @@
   #error "DISABLE_INACTIVE_[XYZIJKUVWE] is now DISABLE_IDLE_[XYZIJKUVWE]."
 #elif defined(DEFAULT_STEPPER_DEACTIVE_TIME)
   #error "DEFAULT_STEPPER_DEACTIVE_TIME is now DEFAULT_STEPPER_TIMEOUT_SEC."
+#elif defined(TFT_SHARED_SPI)
+  #error "TFT_SHARED_SPI is now TFT_SHARED_IO."
 #endif
 
 // L64xx stepper drivers have been removed

diff --git a/Marlin/src/lcd/tft_io/ili9328.h b/Marlin/src/lcd/tft_io/ili9328.h
@@ -39,7 +39,7 @@
 #define ILI9328_ETMOD_ID0         0x0010 // 0 - Horizontal Decrement / 1 - Horizontal Increment
 #define ILI9328_ETMOD_AM          0x0008 // 0 - Horizontal / 1 - Vertical
 
-// MKS Robin TFT v1.1 - 320x240 ; Cable on the left side
+// MKS Robin TFT v1.1 - 320x240 ; FPC cable on the left side
 
 #if TFT_ROTATION == TFT_ROTATE_180
   #define ILI9328_DRVCTL_DATA        0x0000

diff --git a/Marlin/src/lcd/tft_io/ili9341.h b/Marlin/src/lcd/tft_io/ili9341.h
@@ -33,10 +33,10 @@
 #define ILI9341_MADCTL_RGB        0x00
 #define ILI9341_MADCTL_MH         0x04 // Horizontal Refresh Order
 
-#define ILI9341_ORIENTATION_UP    ILI9341_MADCTL_MY                                         // 240x320 ; Cable on the upper side
-#define ILI9341_ORIENTATION_RIGHT ILI9341_MADCTL_MV                                         // 320x240 ; Cable on the right side
-#define ILI9341_ORIENTATION_LEFT  ILI9341_MADCTL_MY | ILI9341_MADCTL_MX | ILI9341_MADCTL_MV // 320x240 ; Cable on the left side
-#define ILI9341_ORIENTATION_DOWN  ILI9341_MADCTL_MX                                         // 240x320 ; Cable on the upper side
+#define ILI9341_ORIENTATION_TOP     ILI9341_MADCTL_MY                                         // 240x320 ; FPC cable on the top side
+#define ILI9341_ORIENTATION_RIGHT   ILI9341_MADCTL_MV                                         // 320x240 ; FPC cable on the right side
+#define ILI9341_ORIENTATION_LEFT    ILI9341_MADCTL_MY | ILI9341_MADCTL_MX | ILI9341_MADCTL_MV // 320x240 ; FPC cable on the left side
+#define ILI9341_ORIENTATION_BOTTOM  ILI9341_MADCTL_MX                                         // 240x320 ; FPC cable on the bottom side
 
 #define ILI9341_ORIENTATION IF_0((TFT_ORIENTATION) & TFT_EXCHANGE_XY, ILI9341_MADCTL_MV) | \
                             IF_0((TFT_ORIENTATION) & TFT_INVERT_X,    ILI9341_MADCTL_MX) | \
@@ -52,7 +52,7 @@
 
 #define ILI9341_NOP               0x00 // No Operation
 #define ILI9341_SWRESET           0x01 // Software Reset
-#define ILI9341_RDDIDIF           0x04 // Read display identification information
+#define ILI9341_RDDIDIF           0x04 // Read Display Identification Information
 #define ILI9341_RDDST             0x09 // Read Display Status
 #define ILI9341_RDDPM             0x0A // Read Display Power Mode
 #define ILI9341_RDDMADCTL         0x0B // Read Display MADCTL
@@ -141,20 +141,21 @@ static const uint16_t ili9341_init[] = {
   DATASIZE_8BIT,
   ESC_REG(ILI9341_SWRESET), ESC_DELAY(100),
   ESC_REG(ILI9341_SLPOUT), ESC_DELAY(20),
-/*
-  ESC_REG(ILI9341_PWCTRLA), 0x0039, 0x002C, 0x0000, 0x0034, 0x0002, // Power control A
-  ESC_REG(ILI9341_PWCTRLB), 0x0000, 0x00C1, 0x0030,                 // Power control B
-  ESC_REG(ILI9341_DRVTCTLA1), 0x0085, 0x0000, 0x0078,               // Driver timing control A
-  ESC_REG(ILI9341_DRVTCTLB), 0x0000, 0x0000,                        // Driver timing control B
-  ESC_REG(ILI9341_PONSEQCTL), 0x0064, 0x0003, 0x0012, 0x0081,       // Power on sequence control
-  ESC_REG(ILI9341_DISCTRL), 0x0008, 0x0082, 0x0027,                 // Display Function Control
-  ESC_REG(ILI9341_PUMPRCTL), 0x0020,                                // Pump ratio control
-  ESC_REG(ILI9341_VMCTRL1), 0x003E, 0x0028,                         // VCOM Control 1
-  ESC_REG(ILI9341_VMCTRL2), 0x0086,                                 // VCOM Control 2
-  ESC_REG(ILI9341_FRMCTR1), 0x0000, 0x0018,                         // Frame Rate Control (In Normal Mode/Full Colors)
-  ESC_REG(ILI9341_PWCTRL1), 0x0023,                                 // Power Control 1
-  ESC_REG(ILI9341_PWCTRL2), 0x0010,                                 // Power Control 2
-*/
+
+  ESC_REG(ILI9341_PWCTRLA), 0x0039, 0x002C, 0x0000, 0x0034, 0x0002,
+  ESC_REG(ILI9341_PWCTRLB), 0x0000, 0x00C1, 0x0030,
+  ESC_REG(ILI9341_DRVTCTLA1), 0x0085, 0x0000, 0x0078,
+  ESC_REG(ILI9341_DRVTCTLB), 0x0000, 0x0000,
+  ESC_REG(ILI9341_PONSEQCTL), 0x0064, 0x0003, 0x0012, 0x0081,
+  ESC_REG(ILI9341_DISCTRL), 0x0008, 0x0082, 0x0027, // Source Output Scan Direction: 0, Gate Output Scan Direction: 0
+  ESC_REG(ILI9341_DINVOFF),
+  ESC_REG(ILI9341_PUMPRCTL), 0x0020,
+  ESC_REG(ILI9341_VMCTRL1), 0x003E, 0x0028,
+  ESC_REG(ILI9341_VMCTRL2), 0x0086,
+  ESC_REG(ILI9341_FRMCTR1), 0x0000, 0x0018,
+  ESC_REG(ILI9341_PWCTRL1), 0x0023,
+  ESC_REG(ILI9341_PWCTRL2), 0x0010,
+
   ESC_REG(ILI9341_MADCTL), ILI9341_MADCTL_DATA,
   ESC_REG(ILI9341_PIXSET), 0x0055,