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⚠️ rework TWI module #865
⚠️ rework TWI module #865
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configure the size of the TWI RX/TX FIFO
add non-blocking functions
typo...
- add configurable data/command FIFO - remove clock-stretching - remove bus sensing - fire IRQ if TX FIFO is empty and no bus operation is in progress
Hi @stnolting, I just skimmed the changes and saw that clock stretching detection was removed. Is it gone for good? So very simple TWI devices that require clock stretching will no longer work? |
After reading this great guide provided by AdaFruit, I had the feeling that clock stretching is not a good idea 🤔 Furthermore, I do not know of any off-the-shelve components that actually use clock stretching. However, maybe I was too hasty. Do you think this is a handy feature that we should add again? |
I don't think that clock stretching is all that bad. But of course slaves that do it in weird ways could be a pain. The BNO055 which also AdaFruit mentions is actually a sensor that utilises/requires clock stretching. I used it together with an ESP32 without problems. And I think to remember seeing actual clock stretching on my digital logic analyzer. I havent used the BNO055 (a really excellent sensor I have to say) with NEORV32. So I don't know if the previously present clock stretching detection would have worked. But if it does not cause too much hastle I'd recommend or actualy prefer the functionality brought back. |
✨ Add Configurable TWI FIFO
An optional FIFO is implemented that can be used to "program" long sequences of TWI operations (START conditions, repeated START conditions, STOP conditions, data transmissions) without further interaction of the CPU. The FIFO is configured by a new top generic: