✨ Add optional external bus interface cache (XCACHE)

[stnolting]

This PR adds an instance of the generic cache module (neorv32_cache.vhd) that is used as cache for the processor-external bus interface (x-cache).

X-cache features:

• direct-mapped architecture
• write-back strategy (write-back modified cache blocks to main memory when they are replaced)
• write-allocate strategy (fetch entire block from main memory on cache write-miss)

New configuration generics:

• XBUS_CACHE_EN: implement the external bus interface cache when _true:
• XBUS_CACHE_NUM_BLOCKS: number of implemented cache blocks (or "cache lines")
• XBUS_CACHE_BLOCK_SIZE: size of a single cache block (or "line") in bytes