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⚠️ constrain MTVAL CSR, add MTINST CSR #674

Merged
merged 8 commits into from
Aug 19, 2023
Merged

⚠️ constrain MTVAL CSR, add MTINST CSR #674

merged 8 commits into from
Aug 19, 2023

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stnolting
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@stnolting stnolting commented Aug 18, 2023 •
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  • ⚠️ constrain mtval CSR - does no longer provide the faulting instruction word when an illegal instruction exception has been raised (allowed by RISC-V priv. spec.; simplifies hardware)
  • add new minstret CSR that shows the (decompressed) instruction word for all synchronous exceptions

@stnolting stnolting added enhancement New feature or request risc-v compliance Modification to comply with official RISC-V specs. HW hardware-related labels Aug 18, 2023
@stnolting stnolting self-assigned this Aug 18, 2023
@stnolting stnolting marked this pull request as ready for review August 19, 2023 15:40
@stnolting stnolting merged commit c30e0d8 into main Aug 19, 2023
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@stnolting stnolting deleted the mtval_mtinst_csrs branch August 19, 2023 16:13
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enhancement New feature or request HW hardware-related risc-v compliance Modification to comply with official RISC-V specs.
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