✨ add SDI module (SPI device-class interface)

[stnolting]

This PR adds a new module to the processor: serial data interface (SDI)

• device class: transmission are triggered/clocked by an external host
• byte-oriented, 2 SPI clock modes (only CPHA = 0 supported yet)
• configurable data FIFO
• programmable interrupt conditions

New Top Generics

IO_SDI_EN   : boolean := false; -- implement serial data interface (SDI)?
IO_SDI_FIFO : natural := 0;     -- SDI RTX fifo depth, has to be zero or a power of two

New Top Signals

-- SDI (available if IO_SDI_EN = true) --
sdi_clk_i : in  std_ulogic := 'U'; -- SDI serial clock
sdi_dat_o : out std_ulogic; -- controller data out, peripheral data in
sdi_dat_i : in  std_ulogic := 'U'; -- controller data in, peripheral data out
sdi_csn_i : in  std_ulogic := 'H'; -- chip-select

🧪 This module is still experimental.