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[rtl] minor edits of FIFO module #408

Merged
merged 9 commits into from
Sep 9, 2022
Merged

[rtl] minor edits of FIFO module #408

merged 9 commits into from
Sep 9, 2022

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stnolting
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The NEORV32 FIFO component now provides an "output gate" option. If enabled, the output data is forced to all-zero if no valid data is available (= FIFO is empty).

Since the FIFO memory (block RAM) does not have a reset, this option can be used to ensure the output data is always defined.

@stnolting stnolting added the HW hardware-related label Sep 9, 2022
@stnolting stnolting self-assigned this Sep 9, 2022
@stnolting stnolting marked this pull request as ready for review September 9, 2022 08:20
@stnolting stnolting merged commit 0d22aaf into main Sep 9, 2022
@stnolting stnolting deleted the fifo_rework branch September 9, 2022 14:29
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