🐛 fix bug in CPU counter overflow logic #310
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+ minor CPU execution and decoding optimizations
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This PR fixes a bug in the CPU's counter overflow logic (low-word to high-word): the overflow bit, which is used as "carry input" for the high-word register, has to be cleared immediately when the counter-incrementing event is not valid anymore.
Affected CPU counters:
cycle->cyclehinstret->instrethhpmcounter*->hpmcounter*hFurthermore, this PR does some minor optimizations of the CPU's
Binstruction decoding and the execution core (one state less in the central FSM).