[rtl/core] rework CPU data path #279
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This PR is a rework of the CPU's internal data path. Basically, the data path is a "tree" of multiplexers that selects one out of different data sources (CSRs, program counter, ALU, memory) to be written to the CPU's register file. My experiments with different styles have shown that a few wide multiplexers might lead to better mapping (and shorter critical path) than many small multiplexers. However, the data path is now much cleaner, easier to understand and requires less control signals.
📚 Furthermore, this PR finally updates the exemplary FPGA implementation results in Datasheet: FPGA Implementation Results.