[SLINK] add fine-grained IRQ configuration #182
Merged
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This PR adds a new memory-mapped register (
NEORV32_SLINK.IRQ
) to the SLINK module, which allows a fine-grained, per-link interrupt configuration.This PR will be merged when testing is done and documentation is updated.
Any kind of feedback is highly appreciated.
Affected peripheral devices
SLINK
(FIRQ 10, 11)Old Version (current state, pre-PR)
In the current version any implemented link will always generate an interrupt (TX links -> TX IRQ, RX links -> RX IRQ):
New Version (this PR)
The reworked SLINK module provides a new register (
NEORV32_SLINK.IRQ
at address0xFFFFFEC8
) address was previously unused) to configure the interrupt condition for each link independently. However, the "global IRQ behavior" remain: if any RX/TX link fulfills the configured IRQ conditions the according SLINK-global RX/TX IRQ is triggered.The new
NEORV32_SLINK.IRQ
provides an individual IRQ enable bit and an individual IRQ type bit for each RX & TX:NEORV32_SLINK.IRQ[7:0]
: SLINK_IRQ_RX_EN, enable IRQ of RX link x (7..0) when setNEORV32_SLINK.IRQ[15:8]
: SLINK_IRQ_RX_MODE,0
= FIFO at least half-full;1
= FIFO not emptyNEORV32_SLINK.IRQ[23:16]
: SLINK_IRQ_TX_EN, enable IRQ of TX link x (7..0) when setNEORV32_SLINK.IRQ[31:24]
: SLINK_IRQ_TX_MODE,0
= FIFO less than half-full;1
= FIFO not fullIf the SLINK FIFO size configuration generic (
SLINK_TX_FIFO
,SLINK_RX_FIFO
) is set to 1 (no actual FIFO, just double-buffering) the according SLINK_IRQ_RX_MODE / SLINK_IRQ_TX_MODE are hard-wired to1
(FIFO not full / not empty).mie
CSR, application software also needs to enable the interrupt enable bits of the individual links (SLINK_IRQ_RX_ENx / SLINK_IRQ_TX_ENx)