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[SLINK] add fine-grained IRQ configuration #182

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merged 10 commits into from
Oct 14, 2021
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@stnolting stnolting commented Oct 13, 2021

This PR adds a new memory-mapped register (NEORV32_SLINK.IRQ) to the SLINK module, which allows a fine-grained, per-link interrupt configuration.

This PR will be merged when testing is done and documentation is updated.
Any kind of feedback is highly appreciated.

Affected peripheral devices

  • SLINK (FIRQ 10, 11)

Old Version (current state, pre-PR)

In the current version any implemented link will always generate an interrupt (TX links -> TX IRQ, RX links -> RX IRQ):

  • RX links: any FIFO's fill-level is above "half-full"
  • TX links: ana FIFO's fill-level is below "half-full"

New Version (this PR)

The reworked SLINK module provides a new register (NEORV32_SLINK.IRQ at address 0xFFFFFEC8) address was previously unused) to configure the interrupt condition for each link independently. However, the "global IRQ behavior" remain: if any RX/TX link fulfills the configured IRQ conditions the according SLINK-global RX/TX IRQ is triggered.

The new NEORV32_SLINK.IRQ provides an individual IRQ enable bit and an individual IRQ type bit for each RX & TX:

  • NEORV32_SLINK.IRQ[7:0]: SLINK_IRQ_RX_EN, enable IRQ of RX link x (7..0) when set
  • NEORV32_SLINK.IRQ[15:8]: SLINK_IRQ_RX_MODE, 0 = FIFO at least half-full; 1 = FIFO not empty
  • NEORV32_SLINK.IRQ[23:16]: SLINK_IRQ_TX_EN, enable IRQ of TX link x (7..0) when set
  • NEORV32_SLINK.IRQ[31:24]: SLINK_IRQ_TX_MODE, 0 = FIFO less than half-full; 1 = FIFO not full

If the SLINK FIFO size configuration generic (SLINK_TX_FIFO, SLINK_RX_FIFO) is set to 1 (no actual FIFO, just double-buffering) the according SLINK_IRQ_RX_MODE / SLINK_IRQ_TX_MODE are hard-wired to 1 (FIFO not full / not empty).

⚠️ Backwards Compatibility

  • besides enabling the according fast interrupt channels in the CPU's mie CSR, application software also needs to enable the interrupt enable bits of the individual links (SLINK_IRQ_RX_ENx / SLINK_IRQ_TX_ENx)
  • keeping SLINK_IRQ_RX_MODE and SLINK_IRQ_TX_MODE cleared (default) provides the same pre-PR functionality

for each RX & TX link:
* IRQ enable
* IRQ type (FIFO state)
@stnolting stnolting self-assigned this Oct 13, 2021
@stnolting stnolting added the enhancement New feature or request label Oct 13, 2021
@stnolting stnolting marked this pull request as draft October 13, 2021 16:56
@stnolting stnolting marked this pull request as ready for review October 13, 2021 23:50
@stnolting stnolting merged commit 38ed476 into master Oct 14, 2021
@stnolting stnolting deleted the slink_fine_grained_irq branch October 14, 2021 14:27
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