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⚠️ Remove AMO_RVS_GRANULARITY generic (#938)
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stnolting committed Jul 3, 2024
2 parents 1937074 + ef5017f commit c4f7caf
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1 change: 1 addition & 0 deletions CHANGELOG.md
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Expand Up @@ -29,6 +29,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12

| Date | Version | Comment | Ticket |
|:----:|:-------:|:--------|:------:|
| 03.07.2024 | 1.10.0.9 | :warning: remove `AMO_RVS_GRANULARITY` generic, reservation set granularity is now fixed to 4 bytes | [#938](https://github.com/stnolting/neorv32/pull/938) |
| 03.07.2024 | 1.10.0.8 | :test_tube: add XBUS to AHB3-lite bridge | [#937](https://github.com/stnolting/neorv32/pull/937) |
| 02.07.2024 | 1.10.0.7 | minor rtl and software edits and cleanups | [#936](https://github.com/stnolting/neorv32/pull/936) |
| 30.06.2024 | 1.10.0.6 | minor rtl edits and cleanups | [#935](https://github.com/stnolting/neorv32/pull/935) |
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12 changes: 4 additions & 8 deletions docs/datasheet/soc.adoc
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Expand Up @@ -231,8 +231,6 @@ The generic type "`suv(x:y)`" is an abbreviation for "`std_ulogic_vector(x downt
4+^| **Hardware Performance Monitors (<<_zihpm_isa_extension>>)**
| `HPM_NUM_CNTS` | natural | 0 | Number of implemented hardware performance monitor counters (0..13).
| `HPM_CNT_WIDTH` | natural | 40 | Total LSB-aligned size of each HPM counter. Min 0, max 64.
4+^| **Atomic Memory Access Reservation Set Granularity (<<_a_isa_extension>>)**
| `AMO_RVS_GRANULARITY` | natural | 4 | Size in bytes, has to be a power of 2, min 4.
4+^| **Internal <<_instruction_memory_imem>>**
| `MEM_INT_IMEM_EN` | boolean | false | Implement the processor-internal instruction memory.
| `MEM_INT_IMEM_SIZE` | natural | 16*1024 | Size in bytes of the processor internal instruction memory (use a power of 2).
Expand Down Expand Up @@ -567,6 +565,10 @@ the reservation is still valid the write access triggered by the SC instruction
return a "success" state (`rd` = 0). If the reservation has been invalidated the SC instruction will not write to memory
and will return a "failed" state (`rd` = 1).

.Reservation Set(s) and Granule
[NOTE]
The reservation set controller supports only **a single** global reservation set with a **word-aligned 4-byte granule**.

The reservation is invalidated if...

* an SC instruction is executed that accesses an address **outside** of the reservation set of the previous LR instruction.
Expand All @@ -593,12 +595,6 @@ The LR/SC mechanism follows the _strong semantic_ approach: the LR/SC instructio
access to the referenced memory location between the LR and SC instructions (by the CPU itself or by the DMA).
Context changes, interrupts, traps, etc. do not effect nor invalidate the reservation state at all.

The controller supports only a single global reservation set. By default this reservation set "monitors" a word-aligned
4-byte granule. However, the granularity can be customized via the `AMO_RVS_GRANULARITY` top entity generic (see
<<_processor_top_entity_generics>>) to cover an arbitrarily large naturally aligned address region. The only constraint is
that the size of the address region has to be a power of two. The configured granularity can be determined by software via
the <<_system_configuration_information_memory_sysinfo>> module.

.Physical Memory Attributes
[NOTE]
The reservation set can be set for _any_ address (only constrained by the configured granularity). This also
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2 changes: 1 addition & 1 deletion docs/datasheet/soc_sysinfo.adoc
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Expand Up @@ -49,7 +49,7 @@ Bit fields in this register are set to all-zero if the according cache is not im
| `0` | `SYSINFO_MEM_IMEM` | _log2_(internal IMEM size in bytes), via top's `MEM_INT_IMEM_SIZE` generic
| `1` | `SYSINFO_MEM_DMEM` | _log2_(internal DMEM size in bytes), via top's `MEM_INT_DMEM_SIZE` generic
| `2` | - | _reserved_, read as zero
| `3` | `SYSINFO_MEM_RVSG` | _log2_(reservation set size granularity in bytes), via top's `AMO_RVS_GRANULARITY` generic
| `3` | - | _reserved_, read as zero
|=======================


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34 changes: 8 additions & 26 deletions rtl/core/neorv32_intercon.vhd
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Expand Up @@ -575,8 +575,7 @@ end neorv32_bus_io_switch_rtl;
-- -------------------------------------------------------------------------------- --
-- Reservation set controller for the A (atomic) ISA extension's LR.W --
-- (load-reservate) and SC.W (store-conditional) instructions. Only a single --
-- reservation set is supported. The reservation set's granularity can be --
-- configured via the GRANULARITY generic. --
-- reservation set (granularity = 4 bytes) is supported. T --
-- -------------------------------------------------------------------------------- --
-- The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 --
-- Copyright (c) NEORV32 contributors. --
Expand All @@ -593,9 +592,6 @@ library neorv32;
use neorv32.neorv32_package.all;

entity neorv32_bus_reservation_set is
generic (
GRANULARITY : natural range 4 to natural'high -- reservation set granularity in bytes; has to be power of 2, min 4
);
port (
-- global control --
clk_i : in std_ulogic; -- global clock, rising edge
Expand All @@ -615,17 +611,10 @@ end neorv32_bus_reservation_set;

architecture neorv32_bus_reservation_set_rtl of neorv32_bus_reservation_set is

-- auto-configuration --
constant granularity_valid_c : boolean := is_power_of_two_f(GRANULARITY);
constant granularity_c : natural := cond_sel_natural_f(granularity_valid_c, GRANULARITY, 2**index_size_f(GRANULARITY));

-- reservation set granularity address boundary bit --
constant abb_c : natural := index_size_f(granularity_c);

-- reservation set --
type rsvs_t is record
state : std_ulogic_vector(01 downto 0);
addr : std_ulogic_vector(31 downto abb_c);
state : std_ulogic_vector(1 downto 0);
addr : std_ulogic_vector(31 downto 2); -- reservated address; 4-byte granularity
valid : std_ulogic;
match : std_ulogic;
end record;
Expand All @@ -636,12 +625,6 @@ architecture neorv32_bus_reservation_set_rtl of neorv32_bus_reservation_set is

begin

-- Sanity Checks --------------------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
assert not (granularity_valid_c = false) report
"[NEORV32] Auto-adjusting invalid reservation set granularity configuration." severity warning;


-- Reservation Set Control ----------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
rvs_control: process(rstn_i, clk_i)
Expand All @@ -655,7 +638,7 @@ begin
when "10" => -- active reservation: wait for condition to invalidate reservation
-- --------------------------------------------------------------------
if (core_req_i.stb = '1') and (core_req_i.rw = '0') and (core_req_i.rvso = '1') then -- another LR instruction overriding the current reservation
rsvs.addr <= core_req_i.addr(31 downto abb_c);
rsvs.addr <= core_req_i.addr(31 downto 2);
end if;
--
if (rvs_clear_i = '1') then -- external clear request (highest priority)
Expand Down Expand Up @@ -684,7 +667,7 @@ begin
when others => -- "0-" no active reservation: wait for new registration request
-- --------------------------------------------------------------------
if (core_req_i.stb = '1') and (core_req_i.rw = '0') and (core_req_i.rvso = '1') then -- load-reservate instruction
rsvs.addr <= core_req_i.addr(31 downto abb_c);
rsvs.addr <= core_req_i.addr(31 downto 2);
rsvs.state <= "10";
end if;

Expand All @@ -693,15 +676,14 @@ begin
end process rvs_control;

-- address match? --
rsvs.match <= '1' when (core_req_i.addr(31 downto abb_c) = rsvs.addr) else '0';
rsvs.match <= '1' when (core_req_i.addr(31 downto 2) = rsvs.addr) else '0';

-- reservation valid? --
rsvs.valid <= rsvs.state(1);

-- status for external system --
rvs_valid_o <= rsvs.valid;
rvs_addr_o(31 downto abb_c) <= rsvs.addr;
rvs_addr_o(abb_c-1 downto 0) <= (others => '0');
rvs_valid_o <= rsvs.valid;
rvs_addr_o <= rsvs.addr & "00";


-- System Bus Interface -------------------------------------------------------------------
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4 changes: 1 addition & 3 deletions rtl/core/neorv32_package.vhd
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Expand Up @@ -29,7 +29,7 @@ package neorv32_package is

-- Architecture Constants -----------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100008"; -- hardware version
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100009"; -- hardware version
constant archid_c : natural := 19; -- official RISC-V architecture ID
constant XLEN : natural := 32; -- native data path width

Expand Down Expand Up @@ -742,8 +742,6 @@ package neorv32_package is
-- Hardware Performance Monitors (HPM) --
HPM_NUM_CNTS : natural range 0 to 13 := 0;
HPM_CNT_WIDTH : natural range 0 to 64 := 40;
-- Atomic Memory Access - Reservation Set Granularity --
AMO_RVS_GRANULARITY : natural range 4 to 2**30 := 4;
-- Internal Instruction memory (IMEM) --
MEM_INT_IMEM_EN : boolean := false;
MEM_INT_IMEM_SIZE : natural := 16*1024;
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3 changes: 1 addition & 2 deletions rtl/core/neorv32_sysinfo.vhd
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Expand Up @@ -24,7 +24,6 @@ entity neorv32_sysinfo is
MEM_INT_IMEM_SIZE : natural; -- size of processor-internal instruction memory in bytes
MEM_INT_DMEM_EN : boolean; -- implement processor-internal data memory
MEM_INT_DMEM_SIZE : natural; -- size of processor-internal data memory in bytes
AMO_RVS_GRANULARITY : natural; -- size in bytes, has to be a power of 2, min 4
ICACHE_EN : boolean; -- implement instruction cache
ICACHE_NUM_BLOCKS : natural; -- i-cache: number of blocks (min 2), has to be a power of 2
ICACHE_BLOCK_SIZE : natural; -- i-cache: block size in bytes (min 4), has to be a power of 2
Expand Down Expand Up @@ -90,7 +89,7 @@ begin
sysinfo(1)(7 downto 0) <= std_ulogic_vector(to_unsigned(index_size_f(MEM_INT_IMEM_SIZE), 8)); -- log2(IMEM size)
sysinfo(1)(15 downto 8) <= std_ulogic_vector(to_unsigned(index_size_f(MEM_INT_DMEM_SIZE), 8)); -- log2(DMEM size)
sysinfo(1)(23 downto 16) <= (others => '0'); -- reserved
sysinfo(1)(31 downto 24) <= std_ulogic_vector(to_unsigned(index_size_f(AMO_RVS_GRANULARITY), 8)); -- log2(reservation set granularity)
sysinfo(1)(31 downto 24) <= (others => '0'); -- reserved

-- SYSINFO(2): SoC Configuration --
sysinfo(2)(0) <= '1' when INT_BOOTLOADER_EN else '0'; -- processor-internal bootloader implemented?
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16 changes: 4 additions & 12 deletions rtl/core/neorv32_top.vhd
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@@ -1,11 +1,10 @@
-- ================================================================================ --
-- NEORV32 SoC - Processor Top Entity --
-- -------------------------------------------------------------------------------- --
-- Check out the processor's online documentation for more information: --
-- > HQ: https://github.com/stnolting/neorv32 --
-- > Data Sheet: https://stnolting.github.io/neorv32 --
-- > User Guide: https://stnolting.github.io/neorv32/ug --
-- > Software Ref: https://stnolting.github.io/neorv32/sw/files.html --
-- HQ: https://github.com/stnolting/neorv32 --
-- Data Sheet: https://stnolting.github.io/neorv32 --
-- User Guide: https://stnolting.github.io/neorv32/ug --
-- Software Ref: https://stnolting.github.io/neorv32/sw/files.html --
-- -------------------------------------------------------------------------------- --
-- The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 --
-- Copyright (c) NEORV32 contributors. --
Expand Down Expand Up @@ -63,9 +62,6 @@ entity neorv32_top is
HPM_NUM_CNTS : natural range 0 to 13 := 0; -- number of implemented HPM counters (0..13)
HPM_CNT_WIDTH : natural range 0 to 64 := 40; -- total size of HPM counters (0..64)

-- Atomic Memory Access - Reservation Set Granularity --
AMO_RVS_GRANULARITY : natural range 4 to 2**30 := 4; -- size in bytes, has to be a power of 2, min 4

-- Internal Instruction memory (IMEM) --
MEM_INT_IMEM_EN : boolean := false; -- implement processor-internal instruction memory
MEM_INT_IMEM_SIZE : natural := 16*1024; -- size of processor-internal instruction memory in bytes (use a power of 2)
Expand Down Expand Up @@ -713,9 +709,6 @@ begin
neorv32_bus_reservation_set_true:
if CPU_EXTENSION_RISCV_A generate
neorv32_bus_reservation_set_inst: entity neorv32.neorv32_bus_reservation_set
generic map (
GRANULARITY => AMO_RVS_GRANULARITY
)
port map (
clk_i => clk_i,
rstn_i => rstn_sys,
Expand Down Expand Up @@ -1604,7 +1597,6 @@ begin
MEM_INT_IMEM_SIZE => imem_size_c,
MEM_INT_DMEM_EN => MEM_INT_DMEM_EN,
MEM_INT_DMEM_SIZE => dmem_size_c,
AMO_RVS_GRANULARITY => AMO_RVS_GRANULARITY,
ICACHE_EN => ICACHE_EN,
ICACHE_NUM_BLOCKS => ICACHE_NUM_BLOCKS,
ICACHE_BLOCK_SIZE => ICACHE_BLOCK_SIZE,
Expand Down
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