[readme] minor cleanups

README.md

@@ -224,40 +224,39 @@ maximum clock speed, minimal area or minimal power consumption:
 This overview provides some *quick links* to the most important sections of the
 [online Data Sheet](https://stnolting.github.io/neorv32) and the [online User Guide](https://stnolting.github.io/neorv32/ug).
 
-### :mag: Project Overview
+### :mag: [NEORV32 Project](https://stnolting.github.io/neorv32/#_overview) - Introduction
 
-* **[NEORV32 Project](https://stnolting.github.io/neorv32/#_overview) - introduction**
-  * [Rationale](https://stnolting.github.io/neorv32/#_rationale) - why? how come? what for?
-  * [Key Features](https://stnolting.github.io/neorv32/#_project_key_features) - what makes it special
-  * [Structure](https://stnolting.github.io/neorv32/#_project_folder_structure) - folders, RTL files and compile order
-  * [Metrics](https://stnolting.github.io/neorv32/#_fpga_implementation_results) - FPGA implementation and performance evaluation
+* [Rationale](https://stnolting.github.io/neorv32/#_rationale) - why? how come? what for?
+* [Key Features](https://stnolting.github.io/neorv32/#_project_key_features) - what makes it special
+* [Structure](https://stnolting.github.io/neorv32/#_project_folder_structure) - folders, RTL files and compile order
+* [Metrics](https://stnolting.github.io/neorv32/#_fpga_implementation_results) - FPGA implementation and performance evaluation
 
-### :electric_plug: Hardware Overview
+### :desktop_computer: [NEORV32 Processor](https://stnolting.github.io/neorv32/#_neorv32_processor_soc) - the SoC
 
-* **[NEORV32 Processor](https://stnolting.github.io/neorv32/#_neorv32_processor_soc) - the SoC**
-  * [Top Entity - Signals](https://stnolting.github.io/neorv32/#_processor_top_entity_signals) - how to connect to the processor
-  * [Top Entity - Generics](https://stnolting.github.io/neorv32/#_processor_top_entity_generics) - processor/CPU configuration options
-  * [Address Space](https://stnolting.github.io/neorv32/#_address_space) - memory layout and boot configurations
-  * [SoC Modules](https://stnolting.github.io/neorv32/#_processor_internal_modules) - IO/peripheral modules and memories
-  * [On-Chip Debugger](https://stnolting.github.io/neorv32/#_on_chip_debugger_ocd) - in-system debugging of the processor via JTAG
+* [Top Entity - Signals](https://stnolting.github.io/neorv32/#_processor_top_entity_signals) - how to connect to the processor
+* [Top Entity - Generics](https://stnolting.github.io/neorv32/#_processor_top_entity_generics) - processor/CPU configuration options
+* [Address Space](https://stnolting.github.io/neorv32/#_address_space) - memory layout and boot configurations
+* [SoC Modules](https://stnolting.github.io/neorv32/#_processor_internal_modules) - IO/peripheral modules and memories
+* [On-Chip Debugger](https://stnolting.github.io/neorv32/#_on_chip_debugger_ocd) - in-system debugging of the processor via JTAG
 
-* **[NEORV32 CPU](https://stnolting.github.io/neorv32/#_neorv32_central_processing_unit_cpu) - the Core**
-  * [RISC-V Compatibility](https://stnolting.github.io/neorv32/#_risc_v_compatibility) - what is compatible to the specs and what is not
-  * [Architecture](https://stnolting.github.io/neorv32/#_architecture) - a look under the hood
-  * [Full Virtualization](https://stnolting.github.io/neorv32/#_full_virtualization) - execution safety
-  * [ISA and Extensions](https://stnolting.github.io/neorv32/#_instruction_sets_and_extensions) - available (RISC-V) ISA extensions
-  * [CSRs](https://stnolting.github.io/neorv32/#_control_and_status_registers_csrs) - control and status registers
-  * [Traps](https://stnolting.github.io/neorv32/#_traps_exceptions_and_interrupts) - interrupts and exceptions
+### :abacus: [NEORV32 CPU](https://stnolting.github.io/neorv32/#_neorv32_central_processing_unit_cpu) - the Core
 
-### :floppy_disk: Software Overview
+* [RISC-V Compatibility](https://stnolting.github.io/neorv32/#_risc_v_compatibility) - what is compatible to the specs and what is not
+* [Architecture](https://stnolting.github.io/neorv32/#_architecture) - a look under the hood
+* [Full Virtualization](https://stnolting.github.io/neorv32/#_full_virtualization) - execution safety
+* [ISA and Extensions](https://stnolting.github.io/neorv32/#_instruction_sets_and_extensions) - available (RISC-V) ISA extensions
+* [CSRs](https://stnolting.github.io/neorv32/#_control_and_status_registers_csrs) - control and status registers
+* [Traps](https://stnolting.github.io/neorv32/#_traps_exceptions_and_interrupts) - interrupts and exceptions
+
+### :floppy_disk: [Software Framework](https://stnolting.github.io/neorv32/#_software_framework) - the NEORV32 Software Ecosystem
 
 * [Example Programs](https://github.com/stnolting/neorv32/tree/main/sw/example) - examples how to use the processor's IO/peripheral modules
 * [Core Libraries](https://stnolting.github.io/neorv32/#_core_libraries) - high-level functions for accessing the processor's peripherals
 * [Software Framework Documentation](https://stnolting.github.io/neorv32/sw/files.html) - _doxygen_-based
 * [Application Makefile](https://stnolting.github.io/neorv32/#_application_makefile) - turning _your_ application into an executable
 * [Bootloader](https://stnolting.github.io/neorv32/#_bootloader) - the build-in NEORV32 bootloader
 
-### :rocket: User Guide
+### :rocket: [User Guide](https://stnolting.github.io/neorv32/ug/) - Getting Started!
 
 * [Toolchain Setup](https://stnolting.github.io/neorv32/ug/#_software_toolchain_setup) - install and setup the RISC-V GCC toolchain
 * [General Hardware Setup](https://stnolting.github.io/neorv32/ug/#_general_hardware_setup) - setup a new NEORV32 FPGA project