[Dependabot]: Bump riscv-arch-test from a3b7f0c
to 873d16e
#103
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Bumps riscv-arch-test from
a3b7f0c
to873d16e
.Commits
873d16e
Merge pull request #348 from Abdulwadoodd/cebreak361cea5
Update changelogs136ab59
Fixc.ebreak
test condition, resolve #344f856b1a
Merge pull request #345 from Abdulwadoodd/cleanup6e7af58
Updated changelogs274b6cd
Updated ISA string of Zefencei formarch
flag, fix #34306532ae
Updated default definition of RVMODEL_FENCEI to nop3caa784
Merge pull request #318 from UmerShahidengr/main04d03ec
Update Change log16f602b
Added CSRs from riscv-opcodesDependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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