Update README.md

README.md

@@ -20,7 +20,8 @@ Currently, the following tests are supported:
 - [x] `rv32i_m\Zicond` - conditional operations
 - [x] `rv32i_m\Zifencei` - instruction stream synchronization
 
-:bulb: The general structure of this repository was setup according to the
+> [!TIP]
+> The general structure of this repository was setup according to the
 [RISCOF installation guide](https://riscof.readthedocs.io/en/stable/installation.html).
 
 
@@ -70,7 +71,8 @@ The "golden reference" data is generated by the **Sail RISC-V Model**. This data
 the DUT. The final test report is made available as CSS-flavored HTML file via the
 [GitHib actions artifact](https://github.com/stnolting/neorv32-riscof/actions).
 
-:bulb: Prebuilt _sail-riscv_ binaries for 64-bit x86 Linux are available in the
+> [!TIP]
+> Prebuilt _sail-riscv_ binaries for 64-bit x86 Linux are available in the
 [`bin`](https://github.com/stnolting/neorv32-riscof/tree/main/bin) folder.
 
 [[back to top](#neorv32-core-verification-using-riscof)]
@@ -101,7 +103,8 @@ a DUT-specific Python script in the DUT's plugin folder
 (-> [`plugin-neorv32/riscof_neorv32.py`](https://github.com/stnolting/neorv32-riscof/blob/main/plugin-neorv32/riscof_neorv32.py)).
 This Python script makes extensive use of shell commands to move and execute files and scripts.
 
-:warning: The Python scripts of **both plugins** override the default `SET_REL_TVAL_MSK` macro from
+> [!WARNING]
+> The Python scripts of **both plugins** override the default `SET_REL_TVAL_MSK` macro from
 `riscv-arch-test/riscv-test-suite/env/arch_test.h` to remove the BREAK exception cause from the relocation list as the
 NEORV32 sets `mtval` to zero for this type of exception. This is **explicitly permitted** by the RISC-V priv. spec.