Add GPIO interrupt enable for Z9100/S6100 and transceiver-plug-inout-…

device/dell/x86_64-dell_z9100_c2538-r0/plugins/sfputil.py

@@ -4,7 +4,10 @@
 #
 
 try:
+    import os
+    import logging
     import time
+    import select
     from sonic_sfp.sfputilbase import SfpUtilBase
 except ImportError as e:
     raise ImportError("%s - required module not found" % str(e))
@@ -337,3 +340,70 @@ def reset(self, port_num):
         reg_file.close()
 
         return True
+
+    def get_register(self, reg_file):
+            retval = 'ERR'
+
+            if (not os.path.isfile(reg_file)):
+                print reg_file,  'not found !'
+                return retval
+
+            try:
+                with open(reg_file, 'r') as fd:
+                    retval = fd.read()
+            except Exception as error:
+                logging.error("Unable to open ", reg_file, "file !")
+
+            retval = retval.rstrip('\r\n')
+            retval = retval.lstrip(" ")
+            return retval
+
+    def get_transceiver_change_event(self, timeout=0):
+            epoll = select.epoll()
+            port_dict = {}
+            try:
+               # We get notified when there is an SCI interrupt from GPIO SUS6
+               fd = open("/sys/devices/platform/dell_ich.0/sci_int_gpio_sus6", "r")
+               epoll.register(fd.fileno(), select.EPOLLIN)
+               events = epoll.poll(timeout=timeout if timeout != 0 else -1)
+               if events:
+                  # Read the QSFP ABS interrupt & status registers
+                  cpld2_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_int")
+                  cpld2_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-14/14-003e/qsfp_abs_sta")
+                  cpld3_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_int")
+                  cpld3_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-15/15-003e/qsfp_abs_sta")
+                  cpld4_abs_int = self.get_register("/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_int")
+                  cpld4_abs_sta = self.get_register("/sys/class/i2c-adapter/i2c-16/16-003e/qsfp_abs_sta")
+
+                  if (cpld2_abs_int == 'ERR' or cpld2_abs_sta == 'ERR' or \
+                      cpld3_abs_int == 'ERR' or cpld3_abs_sta == 'ERR' or \
+                      cpld4_abs_int == 'ERR' or cpld4_abs_sta == 'ERR' ):
+                      return False, {}
+
+                  cpld2_abs_int = int(cpld2_abs_int, 16) 
+                  cpld2_abs_sta = int(cpld2_abs_sta, 16) 
+                  cpld3_abs_int = int(cpld3_abs_int, 16) 
+                  cpld3_abs_sta = int(cpld3_abs_sta, 16) 
+                  cpld4_abs_int = int(cpld4_abs_int, 16) 
+                  cpld4_abs_sta = int(cpld4_abs_sta, 16) 
+
+                  # Make it contiguous (discard reserved bits)
+                  interrupt_reg = (cpld2_abs_int & 0xfff) | ((cpld3_abs_int & 0x3ff) << 12) | ((cpld4_abs_int & 0x3ff) << 22)
+                  status_reg    = (cpld2_abs_sta & 0xfff) | ((cpld3_abs_sta & 0x3ff) << 12) | ((cpld4_abs_sta & 0x3ff) << 22)
+
+                  port=self.port_start
+                  while port <= self.port_end:
+                      if interrupt_reg & (1<<port)):
+                          if status_reg & (1<<port)):
+                              # status reg 1 => optics is removed 
+                              port_dict[port] = '0'
+                          else:
+                              # status reg 0 => optics is inserted
+                              port_dict[port] = '1'
+                      port += 1
+                  return True, port_dict
+            finally:
+                  fd.close()
+                  epoll.close()
+
+            return False, {}