GitHub - smdsahil/RTL-Digital-Design-Basic-to-Advacnce: This repository offers a comprehensive journey through RTL digital design, ranging from fundamental concepts to advanced applications. It features Verilog code and test benches for a variety of circuits, including multiplexers,APB Systems,Simple ALU, and more complex designs such as round-robin arbiters and FIR filters.

smdsahil / RTL-Digital-Design-Basic-to-Advacnce Public

Notifications You must be signed in to change notification settings
Fork 0
Star 0

This repository offers a comprehensive journey through RTL digital design, ranging from fundamental concepts to advanced applications. It features Verilog code and test benches for a variety of circuits, including multiplexers,APB Systems,Simple ALU, and more complex designs such as round-robin arbiters and FIR filters.

0 stars 0 forks Branches Tags Activity

Star

Notifications

Branches Tags

Name		Name	Last commit message	Last commit date
Latest commit History 21 Commits
ALU_8bit.v		ALU_8bit.v
ALU_8bit_tb.v		ALU_8bit_tb.v
LFSR.v		LFSR.v
LFSR_tb.v		LFSR_tb.v
counter.v		counter.v
counter_tb.v		counter_tb.v
dff.v		dff.v
dff_tb.v		dff_tb.v
edge_detector.v		edge_detector.v
edge_detector_tb.v		edge_detector_tb.v
mux2to1.v		mux2to1.v
mux2to1_tb.v		mux2to1_tb.v
simple_shiftRegister.v		simple_shiftRegister.v
simple_shiftRegister_tb.v		simple_shiftRegister_tb.v