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  1. Dadda-8-bit Dadda-8-bit Public

    The computational speed of the dadda multiplier can be enhanced by partitioning the partial products. In process to achieve low power we have considered pass transistor for logical implementation.

    Verilog

  2. Architectural-Design-for-Bus-interface-connected-with-LFSR Architectural-Design-for-Bus-interface-connected-with-LFSR Public

    bus interface, integrating LFSR’s for streamlined register management. Enabled seamless master-peripheral communication, enhancing system efficiency. Orchestrated comprehensive design stages, yield…

    Verilog