Merge pull request #1513 from ved-rivos/rnmi_double_trap

Clarify RNMI and Smdbltrp/Ssdbltrp interaction

src/machine.adoc

@@ -498,9 +498,11 @@ by the same write (For RV32, the `MDT` bit is in `mstatush` and the `MIE` bit in
 
 When a trap is to be taken into M-mode, if the `MDT` bit is currently 0, it is
 then set to 1, and the trap is delivered as expected. However, if `MDT` is
-already set to 1, then this is an _unexpected trap_. Additionally, when the
-Smrnmi extension is implemented, a trap that occurs when executing in M-mode
-with the `mnstatus.NMIE` set to 0 is an _unexpected trap_.
+already set to 1, then this is an _unexpected trap_. When the Smrnmi extension
+is implemented, a trap caused by an RNMI is not considered an _unexpected trap_
+irrespective of the state of the `MDT` bit. A trap caused by an RNMI does not
+set the `MDT` bit. However, a trap that occurs when executing in M-mode with
+`mnstatus.NMIE` set to 0 is an _unexpected trap_.
 
 In the event of a _unexpected trap_, the handling is as follows:
 
@@ -537,6 +539,10 @@ The `MRET` and `SRET` instructions, when executed in M-mode, set the `MDT` bit
 to 0. If the new privilege mode is U, VS, or VU, then `sstatus.SDT` is also set
 to 0. Additionally, if it is VU, then `vsstatus.SDT` is also set to 0.
 
+The `MNRET` instruction, provided by the Smrnmi extension, sets the `MDT` bit to
+0 if the new privilege mode is not M. If it is U, VS, or VU, then `sstatus.SDT` is
+also set to 0. Additionally, if it is VU, then `vsstatus.SDT` is also set to 0.
+
 [[xlen-control]]
 ===== Base ISA Control in `mstatus` Register