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Add marchid for WIV64 (#1183) RISC-V ISA Build #285: Commit f93612d pushed by aswaterman
January 2, 2024 06:45 4m 23s main
main
January 2, 2024 06:45 4m 23s
Add marchid for WIV64 RISC-V ISA Build #284: Pull request #1183 opened by StartForKiller
January 2, 2024 05:22 4m 35s StartForKiller:patch-1
StartForKiller:patch-1
January 2, 2024 05:22 4m 35s
Add marchid for Boa-RISC-V (#1182) RISC-V ISA Build #283: Commit afbf8f7 pushed by aswaterman
January 1, 2024 04:22 4m 48s main
main
January 1, 2024 04:22 4m 48s
Specify that the supervisor physical address is divided by 4 KiB (#1177) RISC-V ISA Build #280: Commit 55ac48d pushed by aswaterman
December 19, 2023 01:42 4m 28s main
main
December 19, 2023 01:42 4m 28s
Specify that the supervisor physical address is divided by 4 KiB RISC-V ISA Build #279: Pull request #1177 opened by charlie-rivos
December 18, 2023 21:39 4m 35s charlie-rivos:add_back_4kib_divisor
charlie-rivos:add_back_4kib_divisor
December 18, 2023 21:39 4m 35s
Restore missing word RISC-V ISA Build #278: Commit 86b685a pushed by aswaterman
December 14, 2023 01:53 4m 39s main
main
December 14, 2023 01:53 4m 39s
Add PMM field to *envcfg and mseccfg (#1170) RISC-V ISA Build #277: Commit af51204 pushed by aswaterman
December 8, 2023 09:57 4m 41s main
main
December 8, 2023 09:57 4m 41s
Add PMM field to *envcfg and mseccfg RISC-V ISA Build #276: Pull request #1170 synchronize by aswaterman
December 8, 2023 09:57 4m 50s pme
pme
December 8, 2023 09:57 4m 50s
Add PMM field to *envcfg and mseccfg RISC-V ISA Build #275: Pull request #1170 synchronize by aswaterman
December 8, 2023 09:56 4m 38s pme
pme
December 8, 2023 09:56 4m 38s
Add PMM field to *envcfg and mseccfg RISC-V ISA Build #274: Pull request #1170 opened by aswaterman
December 1, 2023 02:09 4m 50s pme
pme
December 1, 2023 02:09 4m 50s
Fix MODE field description of mtvec register (#1165) RISC-V ISA Build #273: Commit b0040f3 pushed by aswaterman
November 22, 2023 23:26 4m 47s main
main
November 22, 2023 23:26 4m 47s
Fix MODE field description of mtvec register RISC-V ISA Build #272: Pull request #1165 opened by HepoH3
November 22, 2023 09:52 4m 53s HepoH3:patch-1
HepoH3:patch-1
November 22, 2023 09:52 4m 53s
Application to RISC-V on adding new marchid for CV-Wally from Harvey … RISC-V ISA Build #271: Commit b36aecf pushed by aswaterman
November 21, 2023 01:48 4m 59s main
main
November 21, 2023 01:48 4m 59s
Application to RISC-V on adding new marchid for CV-Wally from Harvey … RISC-V ISA Build #270: Pull request #1164 opened by stineje
November 20, 2023 11:18 4m 56s stineje:main
stineje:main
November 20, 2023 11:18 4m 56s
Vector chapter integration. RISC-V ISA Build #269: Pull request #1088 synchronize by wmat
November 15, 2023 14:24 5m 30s vector
vector
November 15, 2023 14:24 5m 30s
Merge pull request #1162 from OccupyMars2025/patch-1 RISC-V ISA Build #268: Commit ad8d4fc pushed by wmat
November 15, 2023 14:21 6m 46s main
main
November 15, 2023 14:21 6m 46s
Fix typo: "Sv38" => "Sv48" RISC-V ISA Build #267: Pull request #1162 opened by OccupyMars2025
November 15, 2023 09:23 7m 5s OccupyMars2025:patch-1
OccupyMars2025:patch-1
November 15, 2023 09:23 7m 5s
Fix asciidoc representation of HLV[X] instructions RISC-V ISA Build #266: Commit b12e2dc pushed by aswaterman
November 13, 2023 08:22 5m 11s main
main
November 13, 2023 08:22 5m 11s
Drop notes on obsoleted user-mode software interrupts (#1159) RISC-V ISA Build #265: Commit 777bffa pushed by aswaterman
November 9, 2023 04:23 4m 59s main
main
November 9, 2023 04:23 4m 59s
delete user-mode interrupt notes in mtvec register section RISC-V ISA Build #264: Pull request #1159 opened by yf13
November 5, 2023 03:14 4m 52s yf13:fix_mtvec_notes
yf13:fix_mtvec_notes
November 5, 2023 03:14 4m 52s
Fixing CSR Listing table 3 wrapping. RISC-V ISA Build #263: Commit 3c5943d pushed by wmat
October 31, 2023 14:04 8m 11s main
main
October 31, 2023 14:04 8m 11s
Reserve interrupt 13 for Sscofpmf RISC-V ISA Build #262: Commit 12dc920 pushed by aswaterman
October 31, 2023 01:03 5m 41s main
main
October 31, 2023 01:03 5m 41s
Clarify meaning of "platform or custom use" RISC-V ISA Build #261: Commit ea57880 pushed by aswaterman
October 31, 2023 00:38 7m 59s main
main
October 31, 2023 00:38 7m 59s
Define the RV32-only medelegh CSR (#1109) RISC-V ISA Build #260: Commit 38d5bfd pushed by aswaterman
October 31, 2023 00:07 7m 0s main
main
October 31, 2023 00:07 7m 0s
Define the RV32-only medelegh CSR RISC-V ISA Build #259: Pull request #1109 synchronize by aswaterman
October 30, 2023 23:49 5m 54s medelegh
medelegh
October 30, 2023 23:49 5m 54s
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