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Added register entries for pmpaddr registers #70
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@alitariq4589 maybe include the exhaustive list of pmpcfg* as well in this PR |
Sure. I am adding it. |
@neelgala I have added all pmpcfg* registers |
You'll also need to add them to the dictionary inside the |
@pawks I dont see any pmpaddr* register in |
They are added here. |
Slightly off topic: The PMP spec has lot of corner cases, and has one very
ugly oversight: the number of PMP registers is not specified, nor is there
a specified allocation.
Maybe every other register? Only the prime numbered ones? Completely legal.
When tests are generated for BMP, it would be useful to define the CSRs
with #defined names instead of numbers, so that a test could be modified to
adjust for non-standard allocations just by changing the #defines base on a
mask of implemented CSRs provided by the model
…On Sat, Jun 17, 2023 at 4:56 AM Ali Tariq ***@***.***> wrote:
In this PR I have added pmpaddr registers without which riscv_isac cannot
perform coverage of the coverpoints which include pmpaddrX registers. After
this PR, the cgf files with pmp address registers (e.g. pmpaddr1) will
successfully execute with riscv_isac
------------------------------
You can view, comment on, or merge this pull request online at:
#70
Commit Summary
- 1e4d74d
<1e4d74d>
Added register entries for pmpaddr registers
File Changes
(1 file <https://github.com/riscv-software-src/riscv-isac/pull/70/files>)
- *M* riscv_isac/coverage.py
<https://github.com/riscv-software-src/riscv-isac/pull/70/files#diff-b5454e2defdd8d2dfa6e943f56243ca817f3c26606912111092abdbcecb3178b>
(64)
Patch Links:
- https://github.com/riscv-software-src/riscv-isac/pull/70.patch
- https://github.com/riscv-software-src/riscv-isac/pull/70.diff
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Good point @allenjbaum, but here we are trying to simplify the register entries by following Sail as reference. Currently Sail supports 16 pmpaddr and 4 pmpcfg regs so those entries have been added in ISAC to test some coverpoint definitions related to PMP. |
@alitariq4589 please change the target branch of the PR to |
In this PR I have added pmpaddr registers without which riscv_isac cannot perform coverage of the coverpoints which include pmpaddrX registers. After this PR, the cgf files with pmp address registers (e.g. pmpaddr1) will successfully execute with
riscv_isac