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fix code review
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@cassio-lazaro
cassio-lazaro committed Jun 21, 2024
1 parent 3adbaba commit bc3dba1
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Showing 3 changed files with 67 additions and 68 deletions.
59 changes: 29 additions & 30 deletions hal_st/stm32fxxx/SpiMasterStm.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -87,11 +87,11 @@ namespace hal
});

#ifdef SPI_IER_RXPIE
peripheralSpi[spiInstance]->IER |= SPI_IT_TXP;
peripheralSpi[spiInstance]->IER |= SPI_IT_RXP;
peripheralSpi[spiInstance]->IER |= SPI_IER_TXPIE;
peripheralSpi[spiInstance]->IER |= SPI_IER_RXPIE;
#else
peripheralSpi[spiInstance]->CR2 |= SPI_IT_TXE;
peripheralSpi[spiInstance]->CR2 |= SPI_IT_RXNE;
peripheralSpi[spiInstance]->CR2 |= SPI_CR2_TXEIE;
peripheralSpi[spiInstance]->CR2 |= SPI_CR2_RXNEIE;
#endif
}

Expand All @@ -117,63 +117,62 @@ namespace hal
void SpiMasterStm::HandleInterrupt()
{
uint32_t status = peripheralSpi[spiInstance]->SR;
#ifdef SPI_FLAG_RXNE
if ((status & SPI_FLAG_RXNE) != 0)
#ifdef SPI_SR_RXNE
if ((status & SPI_SR_RXNE) != 0)
#else
if ((status & SPI_IT_RXP) != 0)
if ((status & SPI_SR_RXP) != 0)
#endif
{
if (dummyToReceive != 0)
{
#ifdef SPI_RXDR_RXDR
(void)peripheralSpi[spiInstance]->RXDR;
#else
#ifdef SPI_DR_DR
(void)peripheralSpi[spiInstance]->DR;
#else
(void)peripheralSpi[spiInstance]->RXDR;
#endif
--dummyToReceive;
}
else if (receiving)
{
#ifdef SPI_RXDR_RXDR
receiveData.front() = peripheralSpi[spiInstance]->RXDR;
#else
#ifdef SPI_DR_DR
receiveData.front() = peripheralSpi[spiInstance]->DR;
#else
receiveData.front() = peripheralSpi[spiInstance]->RXDR;
#endif
receiveData.pop_front();
}

receiving &= !receiveData.empty();

if (dummyToReceive == 0 && !receiving)
#ifdef SPI_IER_RXPIE
peripheralSpi[spiInstance]->IER &= ~SPI_IT_RXP;
#ifdef SPI_CR2_RXNEIE
peripheralSpi[spiInstance]->CR2 &= ~SPI_CR2_RXNEIE;
#else
peripheralSpi[spiInstance]->CR2 &= ~SPI_IT_RXNE;
peripheralSpi[spiInstance]->IER &= ~SPI_IER_RXPIE;
#endif
}

#ifdef SPI_SR_TXP
if ((status & SPI_FLAG_TXP) != 0)
#ifdef SPI_SR_TXE
if ((status & SPI_SR_TXE) != 0)
#else
if ((status & SPI_FLAG_TXE) != 0)
if ((status & SPI_SR_TXP) != 0)
#endif
{
if (dummyToSend != 0)
{
#ifdef SPI_TXDR_TXDR
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->TXDR) = 0;
#else
#ifdef SPI_DR_DR
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->DR) = 0;
#else
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->TXDR) = 0;
#endif
--dummyToSend;
}
else if (sending)
{
#ifdef SPI_TXDR_TXDR
#ifdef SPI_DR_DR
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->DR) = sendData.front();
#else
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->TXDR) = sendData.front();
peripheralSpi[spiInstance]->CR1 |= SPI_CR1_CSTART;
#else
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->DR) = sendData.front();
#endif
sendData.pop_front();
}
Expand All @@ -182,14 +181,14 @@ namespace hal

// After the first transmit, disable interrupt on transmit buffer empty,
// so that a receive is done before each transmit
#ifdef SPI_IER_TXPIE
peripheralSpi[spiInstance]->IER &= ~SPI_IT_TXP;
#ifdef SPI_CR2_TXEIE
peripheralSpi[spiInstance]->CR2 &= ~SPI_CR2_TXEIE;
#else
peripheralSpi[spiInstance]->CR2 &= ~SPI_IT_TXE;
peripheralSpi[spiInstance]->IER &= ~SPI_IER_TXPIE;
#endif
}

really_assert(!(peripheralSpi[spiInstance]->SR & SPI_FLAG_OVR));
really_assert(!(peripheralSpi[spiInstance]->SR & SPI_SR_OVR));

spiInterruptRegistration->ClearPending();

Expand Down
16 changes: 8 additions & 8 deletions hal_st/stm32fxxx/SpiMasterStmDma.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -225,23 +225,23 @@ namespace hal

void SpiMasterStmDma::EnableDma()
{
#ifdef SPI_CFG1_TXDMAEN
peripheralSpi[spiInstance]->CFG1 |= SPI_CFG1_RXDMAEN;
peripheralSpi[spiInstance]->CFG1 |= SPI_CFG1_TXDMAEN;
#else
#ifdef SPI_CR2_RXDMAEN
peripheralSpi[spiInstance]->CR2 |= SPI_CR2_RXDMAEN;
peripheralSpi[spiInstance]->CR2 |= SPI_CR2_TXDMAEN;
#else
peripheralSpi[spiInstance]->CFG1 |= SPI_CFG1_RXDMAEN;
peripheralSpi[spiInstance]->CFG1 |= SPI_CFG1_TXDMAEN;
#endif
}

void SpiMasterStmDma::DisableDma()
{
#ifdef SPI_CFG1_TXDMAEN
peripheralSpi[spiInstance]->CFG1 &= ~SPI_CFG1_TXDMAEN;
peripheralSpi[spiInstance]->CFG1 &= ~SPI_CFG1_RXDMAEN;
#else
#ifdef SPI_CR2_TXDMAEN
peripheralSpi[spiInstance]->CR2 &= ~SPI_CR2_TXDMAEN;
peripheralSpi[spiInstance]->CR2 &= ~SPI_CR2_RXDMAEN;
#else
peripheralSpi[spiInstance]->CFG1 &= ~SPI_CFG1_TXDMAEN;
peripheralSpi[spiInstance]->CFG1 &= ~SPI_CFG1_RXDMAEN;
#endif
}
}
60 changes: 30 additions & 30 deletions hal_st/synchronous_stm32fxxx/SynchronousSpiMasterStm.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -73,12 +73,12 @@ namespace hal
if (!receiving)
dummyToReceive = sendData.size();

#ifdef SPI_IER_RXPIE
peripheralSpi[spiInstance]->IER |= SPI_IT_TXP;
peripheralSpi[spiInstance]->IER |= SPI_IT_RXP;
#ifdef SPI_CR2_TXEIE
peripheralSpi[spiInstance]->CR2 |= SPI_CR2_TXEIE;
peripheralSpi[spiInstance]->CR2 |= SPI_CR2_RXNEIE;
#else
peripheralSpi[spiInstance]->CR2 |= SPI_IT_TXE;
peripheralSpi[spiInstance]->CR2 |= SPI_IT_RXNE;
peripheralSpi[spiInstance]->IER |= SPI_IER_TXPIE;
peripheralSpi[spiInstance]->IER |= SPI_IER_RXPIE;
#endif

while (sending || receiving || dummyToSend != 0 || dummyToReceive != 0)
Expand All @@ -88,63 +88,63 @@ namespace hal
void SynchronousSpiMasterStm::HandleInterrupt()
{
uint32_t status = peripheralSpi[spiInstance]->SR;
#ifdef SPI_FLAG_RXNE
if ((status & SPI_FLAG_RXNE) != 0)
#ifdef SPI_SR_RXNE
if ((status & SPI_SR_RXNE) != 0)
#else
if ((status & SPI_IT_RXP) != 0)
if ((status & SPI_SR_RXP) != 0)
#endif
{
if (dummyToReceive != 0)
{
#ifdef SPI_RXDR_RXDR
(void)peripheralSpi[spiInstance]->RXDR;
#else
#ifdef SPI_DR_DR
(void)peripheralSpi[spiInstance]->DR;
#else
(void)peripheralSpi[spiInstance]->RXDR;
#endif
--dummyToReceive;
}
else if (receiving)
{
#ifdef SPI_RXDR_RXDR
receiveData.front() = peripheralSpi[spiInstance]->RXDR;
#else
#ifdef SPI_DR_DR
receiveData.front() = peripheralSpi[spiInstance]->DR;
#else
receiveData.front() = peripheralSpi[spiInstance]->RXDR;
#endif
receiveData.pop_front();
}

receiving &= !receiveData.empty();

if (dummyToReceive == 0 && !receiving)
#ifdef SPI_IER_RXPIE
peripheralSpi[spiInstance]->IER &= ~SPI_IT_RXP;
#ifdef SPI_CR2_RXNEIE
peripheralSpi[spiInstance]->CR2 &= ~SPI_CR2_RXNEIE;
#else
peripheralSpi[spiInstance]->CR2 &= ~SPI_IT_RXNE;
peripheralSpi[spiInstance]->IER &= ~SPI_IER_RXPIE;
#endif
}

#ifdef SPI_SR_TXP
if ((status & SPI_FLAG_TXP) != 0)
#ifdef SPI_SR_TXE
if ((status & SPI_SR_TXE) != 0)
#else
if ((status & SPI_FLAG_TXE) != 0)
if ((status & SPI_SR_TXP) != 0)
#endif
{
if (dummyToSend != 0)
{
#ifdef SPI_TXDR_TXDR
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->TXDR) = 0;
#else
#ifdef SPI_DR_DR
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->DR) = 0;
#else
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->TXDR) = 0;
#endif
--dummyToSend;
}
else if (sending)
{
#ifdef SPI_TXDR_TXDR
#ifdef SPI_DR_DR
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->DR) = sendData.front();
#else
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->TXDR) = sendData.front();
peripheralSpi[spiInstance]->CR1 |= SPI_CR1_CSTART;
#else
reinterpret_cast<volatile uint8_t&>(peripheralSpi[spiInstance]->DR) = sendData.front();
#endif
sendData.pop_front();
}
Expand All @@ -153,13 +153,13 @@ namespace hal

// After the first transmit, disable interrupt on transmit buffer empty,
// so that a receive is done before each transmit
#ifdef SPI_IER_TXPIE
peripheralSpi[spiInstance]->IER &= ~SPI_IT_TXP;
#ifdef SPI_CR2_TXEIE
peripheralSpi[spiInstance]->CR2 &= ~SPI_CR2_TXEIE;
#else
peripheralSpi[spiInstance]->CR2 &= ~SPI_IT_TXE;
peripheralSpi[spiInstance]->IER &= ~SPI_IER_TXPIE;
#endif
}

really_assert(!(peripheralSpi[spiInstance]->SR & SPI_FLAG_OVR));
really_assert(!(peripheralSpi[spiInstance]->SR & SPI_SR_OVR));
}
}

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