[LV] Adjust test for #48188 to use AVX level closer to report.

Update AVX level for #48188
to be closer to the one used in the preproducer.

llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll

@@ -1,33 +1,54 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -O2 -mattr=avx < %s | FileCheck %s
-; RUN: opt -S -passes="default<O2>" -mattr=avx < %s | FileCheck %s
+; RUN: opt -S -passes="default<O2>" -mattr=avx < %s | FileCheck --check-prefix=AVX %s
+; RUN: opt -S -passes="default<O2>" -mattr=avx2 < %s | FileCheck --check-prefix=AVX2 %s
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; FIXME: The br -> switch conversion blocks vectorization.
 
 define dso_local void @test(ptr %start, ptr %end) #0 {
-; CHECK-LABEL: @test(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[I11_NOT1:%.*]] = icmp eq ptr [[START:%.*]], [[END:%.*]]
-; CHECK-NEXT:    br i1 [[I11_NOT1]], label [[EXIT:%.*]], label [[BB12:%.*]]
-; CHECK:       bb12:
-; CHECK-NEXT:    [[PTR2:%.*]] = phi ptr [ [[PTR_NEXT:%.*]], [[LATCH:%.*]] ], [ [[START]], [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[VAL:%.*]] = load i32, ptr [[PTR2]], align 4
-; CHECK-NEXT:    switch i32 [[VAL]], label [[LATCH]] [
-; CHECK-NEXT:    i32 -12, label [[STORE:%.*]]
-; CHECK-NEXT:    i32 13, label [[STORE]]
-; CHECK-NEXT:    ]
-; CHECK:       store:
-; CHECK-NEXT:    store i32 42, ptr [[PTR2]], align 4
-; CHECK-NEXT:    br label [[LATCH]]
-; CHECK:       latch:
-; CHECK-NEXT:    [[PTR_NEXT]] = getelementptr inbounds i8, ptr [[PTR2]], i64 4
-; CHECK-NEXT:    [[I11_NOT:%.*]] = icmp eq ptr [[PTR_NEXT]], [[END]]
-; CHECK-NEXT:    br i1 [[I11_NOT]], label [[EXIT]], label [[BB12]]
-; CHECK:       exit:
-; CHECK-NEXT:    ret void
+; AVX-LABEL: @test(
+; AVX-NEXT:  entry:
+; AVX-NEXT:    [[I11_NOT1:%.*]] = icmp eq ptr [[START:%.*]], [[END:%.*]]
+; AVX-NEXT:    br i1 [[I11_NOT1]], label [[EXIT:%.*]], label [[BB12:%.*]]
+; AVX:       bb12:
+; AVX-NEXT:    [[PTR2:%.*]] = phi ptr [ [[PTR_NEXT:%.*]], [[LATCH:%.*]] ], [ [[START]], [[ENTRY:%.*]] ]
+; AVX-NEXT:    [[VAL:%.*]] = load i32, ptr [[PTR2]], align 4
+; AVX-NEXT:    switch i32 [[VAL]], label [[LATCH]] [
+; AVX-NEXT:      i32 -12, label [[STORE:%.*]]
+; AVX-NEXT:      i32 13, label [[STORE]]
+; AVX-NEXT:    ]
+; AVX:       store:
+; AVX-NEXT:    store i32 42, ptr [[PTR2]], align 4
+; AVX-NEXT:    br label [[LATCH]]
+; AVX:       latch:
+; AVX-NEXT:    [[PTR_NEXT]] = getelementptr inbounds i8, ptr [[PTR2]], i64 4
+; AVX-NEXT:    [[I11_NOT:%.*]] = icmp eq ptr [[PTR_NEXT]], [[END]]
+; AVX-NEXT:    br i1 [[I11_NOT]], label [[EXIT]], label [[BB12]]
+; AVX:       exit:
+; AVX-NEXT:    ret void
+;
+; AVX2-LABEL: @test(
+; AVX2-NEXT:  entry:
+; AVX2-NEXT:    [[I11_NOT1:%.*]] = icmp eq ptr [[START:%.*]], [[END:%.*]]
+; AVX2-NEXT:    br i1 [[I11_NOT1]], label [[EXIT:%.*]], label [[BB12:%.*]]
+; AVX2:       bb12:
+; AVX2-NEXT:    [[PTR2:%.*]] = phi ptr [ [[PTR_NEXT:%.*]], [[LATCH:%.*]] ], [ [[START]], [[ENTRY:%.*]] ]
+; AVX2-NEXT:    [[VAL:%.*]] = load i32, ptr [[PTR2]], align 4
+; AVX2-NEXT:    switch i32 [[VAL]], label [[LATCH]] [
+; AVX2-NEXT:      i32 -12, label [[STORE:%.*]]
+; AVX2-NEXT:      i32 13, label [[STORE]]
+; AVX2-NEXT:    ]
+; AVX2:       store:
+; AVX2-NEXT:    store i32 42, ptr [[PTR2]], align 4
+; AVX2-NEXT:    br label [[LATCH]]
+; AVX2:       latch:
+; AVX2-NEXT:    [[PTR_NEXT]] = getelementptr inbounds i8, ptr [[PTR2]], i64 4
+; AVX2-NEXT:    [[I11_NOT:%.*]] = icmp eq ptr [[PTR_NEXT]], [[END]]
+; AVX2-NEXT:    br i1 [[I11_NOT]], label [[EXIT]], label [[BB12]]
+; AVX2:       exit:
+; AVX2-NEXT:    ret void
 ;
 entry:
   br label %header