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Merge branch 'main' into dev
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gmlarumbe committed May 27, 2023
2 parents af46210 + 43840f8 commit c64887a
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Showing 5 changed files with 6 additions and 9 deletions.
2 changes: 1 addition & 1 deletion snippets/verilog-mode/uvm_info
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# -*- mode: snippet -*-
# key: ui
# --
\`uvm_info(${1:get_name()}, ${2:$sformatf("${3:<Message string>: %s}", ${4:<arg>})}, ${5:UVM_MEDIUM})
\`uvm_info(${1:get_name()}, ${2:$sformatf("${3:<Message string>: %s}"${4:, ${5:<arg>}})}, ${6:UVM_MEDIUM})
$0
2 changes: 1 addition & 1 deletion snippets/verilog-mode/uvm_object
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Expand Up @@ -7,7 +7,7 @@ class ${1:class_name} extends ${2:uvm_sequence_item};

$0

function new(string name);
function new(string name = "$1");
super.new(name);
endfunction : new

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2 changes: 1 addition & 1 deletion snippets/verilog-mode/uvm_typeid_create
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# -*- mode: snippet -*-
# key: ut
# --
${1:name} = ${2:class_name}::type_id::create("$1", this);
${1:name} = ${2:class_name}::type_id::create("$1"${3:, this});
$0
7 changes: 2 additions & 5 deletions verilog-ext-flycheck.el
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Expand Up @@ -93,12 +93,9 @@ https://chipsalliance.github.io/verible/lint.html"
(add-to-list 'flycheck-checkers checker))
(verilog-ext-flycheck-set-linter verilog-ext-flycheck-linter))

(defun verilog-ext-flycheck-mode-toggle (&optional uarg)
(defun verilog-ext-flycheck-mode (&optional uarg)
"`flycheck-mode' Verilog wrapper function.
If called with UARG select among available linters and enable flycheck.
Disable function `eldoc-mode' if flycheck is enabled
to avoid minibuffer collisions."
If called with UARG select among available linters and enable flycheck."
(interactive "P")
(let (enable)
(when buffer-read-only
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2 changes: 1 addition & 1 deletion verilog-ext.el
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Expand Up @@ -174,7 +174,7 @@ FEATURES can be a single feature or a list of features."
(verilog-ext-when-feature 'compilation
(define-key map (kbd "C-c C-p") 'verilog-ext-preprocess))
(verilog-ext-when-feature 'flycheck
(define-key map (kbd "C-c C-f") 'verilog-ext-flycheck-mode-toggle))
(define-key map (kbd "C-c C-f") 'verilog-ext-flycheck-mode))
(verilog-ext-when-feature 'template
(define-key map (kbd "C-c C-t") 'verilog-ext-hydra/body))
(verilog-ext-when-feature 'hierarchy
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