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Update test-hdl ref
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@gmlarumbe
gmlarumbe committed Jan 9, 2024
1 parent 6f4fd7d commit 9108d41
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4 changes: 3 additions & 1 deletion misc/notes.org
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Expand Up @@ -365,7 +365,7 @@ DANGER: Still very inefficient, removed funcall in
** TODO Dev: Check ox-hugo to generate blog with short tutorial
** TODO Dev: Rebase/rewrite tree-sitter-verilog
** TODO Pending before release 0.5.0
*** TODO Dev: vhdl-ts-mode: 'symbols in regexp-opts
*** TODO Dev: vhdl-ext: enable hideshow by default, similar to verilog-ext
*** TODO Dev: verilog-ext
- [-] Check functionality: last 1 checked was navigation (still the fix for the define-key-map), continue on template
- [X] navigation: all except `verilog-ext-forward-word', `verilog-ext-backward-word' and `verilog-ext-jump-to-parent-module'
Expand Down Expand Up @@ -393,6 +393,8 @@ the proper one depending on if verilog-mode or verilog-ts-mode
- Use tree-sitter parsing to get the ports, their type, and their names and save them in some variable
- Use this variable to generate the instantiation

*** DONE Dev: vhdl-ts-mode: 'symbols in regexp-opts
CLOSED: [2024-01-10 Wed 00:28]
*** DONE Dev: vhdl-ext
CLOSED: [2023-12-22 Fri 14:08]
- [X] Missing vhdl-ts-mode integration:
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2 changes: 1 addition & 1 deletion test-hdl
Submodule test-hdl updated 17 files
+5 −5 vhdl/files/capf/vhdl-ext/ref/axi_if_converter.annotations.el
+5 −5 vhdl/files/capf/vhdl-ext/ref/axi_if_converter.capf.el
+4 −4 vhdl/files/capf/vhdl-ext/ref/global_sim.annotations.el
+4 −4 vhdl/files/capf/vhdl-ext/ref/global_sim.capf.el
+81 −0 vhdl/files/common/indent_misc.vhd
+81 −0 vhdl/files/faceup/vhdl-ext/ref/indent_misc.faceup
+81 −0 vhdl/files/faceup/vhdl-ts-mode/ref/indent_misc.faceup
+11 −2 vhdl/files/imenu/vhdl-ext/ref/indent_misc.el
+11 −1 vhdl/files/imenu/vhdl-ts-mode/ref/indent_misc.el
+81 −0 vhdl/files/indent/vhdl-ts-mode/ref/indent_misc.no_deindent.vhd
+81 −0 vhdl/files/indent/vhdl-ts-mode/ref/indent_misc.vhd
+1 −1 vhdl/files/navigation/vhdl-ts-mode/ref/indent_misc.block.bwd.el
+1 −1 vhdl/files/navigation/vhdl-ts-mode/ref/indent_misc.block.fwd.el
+45 −1 vhdl/files/tags/vhdl-ext/ref/indent_misc.ts.defs.el
+242 −2 vhdl/files/tags/vhdl-ext/ref/indent_misc.ts.refs.el
+1 −1 vhdl/files/utils/vhdl-ext/ref/indent_misc.scan.entities.el
+1 −1 vhdl/files/utils/vhdl-ext/ref/indent_misc.ts.scan.entities.el

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