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merge with tcp.
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@d-kor
d-kor committed Aug 8, 2023
2 parents bca3563 + c9b58f0 commit 42e63d5
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Showing 32 changed files with 1,368 additions and 933 deletions.
16 changes: 11 additions & 5 deletions flow_alveo.sh
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Original file line number Diff line number Diff line change
Expand Up @@ -95,17 +95,18 @@ if [ $DRV_INSERT -eq 1 ]; then

echo "*** Rescan PCIe ..."
echo " ** "
parallel-ssh -H "$hostlist" -x '-tt' 'sudo /opt/cli/program/pci_hot_plug "$(hostname -s)"'

# read -p "Hot-reset done. Press enter to load the driver or Ctrl-C to exit."
#parallel-ssh -H "$hostlist" -x '-tt' 'sudo /opt/cli/program/pci_hot_plug "$(hostname -s)"'
# read -p "Hot-reset done. Press enter to load the driver or Ctrl-C to exit."
parallel-ssh -H "$hostlist" -x '-tt' 'upstream_port=$(/opt/cli/get/get_fpga_device_param 1 upstream_port) && root_port=$(/opt/cli/get/get_fpga_device_param 1 root_port) && LinkCtl=$(/opt/cli/get/get_fpga_device_param 1 LinkCtl) && sudo /opt/cli/program/pci_hot_plug 1 $upstream_port $root_port $LinkCtl'
# read -p "Hot-reset done. Press enter to load the driver or Ctrl-C to exit."
echo "*** Compiling the driver ..."
echo " ** "
parallel-ssh -H "$hostlist" "make -C $BASE_PATH/$DRV_PATH"

echo "*** Loading the driver ..."
echo " ** "
qsfp_ip="FPGA_$3_IP_ADDRESS_HEX"
qsfp_mac="FPGA_$3_MAC_ADDRESS"
qsfp_ip="DEVICE_$3_IP_ADDRESS_HEX"
qsfp_mac="DEVICE_$3_MAC_ADDRESS"

parallel-ssh -H "$hostlist" -x '-tt' "sudo insmod $BASE_PATH/$DRV_PATH/coyote_drv.ko ip_addr_q$3=\$$qsfp_ip mac_addr_q$3=\$$qsfp_mac"
parallel-ssh -H "$hostlist" -x '-tt' "sudo /opt/cli/program/fpga_chmod 0"
Expand All @@ -119,6 +120,11 @@ if [ $DRV_INSERT -eq 1 ]; then

echo "*** Driver loaded"
echo " ** "

#parallel-ssh -H "$hostlist" -x '-tt' "sudo insmod $BASE_PATH/$DRV_PATH/coyote_drv.ko ip_addr_q0=$DEVICE_1_IP_ADDRESS_HEX_0 mac_addr_q0=$DEVICE_1_MAC_ADDRESS_0 && "
#parallel-ssh -H "$hostlist" -x '-tt' "sudo /opt/cli/program/fpga_chmod 0"
#echo "*** Driver loaded"
#echo " ** "
fi


52 changes: 50 additions & 2 deletions hw/hdl/common/queues/meta_queue.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,56 @@ module meta_queue #(
metaIntf.m m_meta
);

if(DATA_BITS == 32) begin
axis_data_fifo_meta_32 inst_meta (
if(DATA_BITS == 8) begin
axis_data_fifo_meta_8 inst_meta (
.s_axis_aresetn(aresetn),
.s_axis_aclk(aclk),
.s_axis_tvalid(s_meta.valid),
.s_axis_tready(s_meta.ready),
.s_axis_tdata(s_meta.data),
.m_axis_tvalid(m_meta.valid),
.m_axis_tready(m_meta.ready),
.m_axis_tdata(m_meta.data)
);
end
else if(DATA_BITS == 16) begin
axis_data_fifo_meta_16 inst_meta (
.s_axis_aresetn(aresetn),
.s_axis_aclk(aclk),
.s_axis_tvalid(s_meta.valid),
.s_axis_tready(s_meta.ready),
.s_axis_tdata(s_meta.data),
.m_axis_tvalid(m_meta.valid),
.m_axis_tready(m_meta.ready),
.m_axis_tdata(m_meta.data)
);
end
else if(DATA_BITS == 32) begin
axis_data_fifo_meta_32 inst_meta (
.s_axis_aresetn(aresetn),
.s_axis_aclk(aclk),
.s_axis_tvalid(s_meta.valid),
.s_axis_tready(s_meta.ready),
.s_axis_tdata(s_meta.data),
.m_axis_tvalid(m_meta.valid),
.m_axis_tready(m_meta.ready),
.m_axis_tdata(m_meta.data)
);
end
else if(DATA_BITS == 48) begin
axis_data_fifo_meta_48 inst_meta (
.s_axis_aresetn(aresetn),
.s_axis_aclk(aclk),
.s_axis_tvalid(s_meta.valid),
.s_axis_tready(s_meta.ready),
.s_axis_tdata(s_meta.data),
.m_axis_tvalid(m_meta.valid),
.m_axis_tready(m_meta.ready),
.m_axis_tdata(m_meta.data)
);
end
else if(DATA_BITS == 72) begin
axis_data_fifo_meta_72 inst_meta (
.s_axis_aresetn(aresetn),
.s_axis_aclk(aclk),
.s_axis_tvalid(s_meta.valid),
Expand Down
31 changes: 31 additions & 0 deletions hw/hdl/mmu/tlb_region_top.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -110,6 +110,23 @@ module tlb_region_top #(
output cred_t rd_dest_host,
`endif

// TCP Session Management
`ifdef EN_TCP_0
metaIntf.m m_open_port_cmd_0,
metaIntf.m m_open_con_cmd_0,
metaIntf.m m_close_con_cmd_0,
metaIntf.s s_open_con_sts_0,
metaIntf.s s_open_port_sts_0,
`endif

`ifdef EN_TCP_1
metaIntf.m m_open_port_cmd_1,
metaIntf.m m_open_con_cmd_1,
metaIntf.m m_close_con_cmd_1,
metaIntf.s s_open_con_sts_1,
metaIntf.s s_open_port_sts_1,
`endif

`ifdef EN_MEM
// Card DMAs
dmaIntf.m m_rd_DDMA [N_CARD_AXI],
Expand Down Expand Up @@ -422,6 +439,20 @@ axis_interconnect_tlb inst_mux_ltlb (
.s_sync_done_rd(rd_sync_done),
.s_sync_done_wr(wr_sync_done),
`endif
`ifdef EN_TCP_0
.m_open_port_cmd_0(m_open_port_cmd_0),
.m_open_con_cmd_0(m_open_con_cmd_0),
.m_close_con_cmd_0(m_close_con_cmd_0),
.s_open_con_sts_0(s_open_con_sts_0),
.s_open_port_sts_0(s_open_port_sts_0),
`endif
`ifdef EN_TCP_1
.m_open_port_cmd_1(m_open_port_cmd_1),
.m_open_con_cmd_1(m_open_con_cmd_1),
.m_close_con_cmd_1(m_close_con_cmd_1),
.s_open_con_sts_1(s_open_con_sts_1),
.s_open_port_sts_1(s_open_port_sts_1),
`endif
`ifdef EN_WB
.m_wback(m_wback),
`endif
Expand Down
31 changes: 31 additions & 0 deletions hw/hdl/mmu/tlb_top.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -109,6 +109,23 @@ module tlb_top #(
muxIntf.s s_mux_host_wr_user,
`endif

// TCP Session Management
`ifdef EN_TCP_0
metaIntf.m m_open_port_cmd_0 [N_REGIONS],
metaIntf.m m_open_con_cmd_0 [N_REGIONS],
metaIntf.m m_close_con_cmd_0 [N_REGIONS],
metaIntf.s s_open_con_sts_0 [N_REGIONS],
metaIntf.s s_open_port_sts_0 [N_REGIONS],
`endif

`ifdef EN_TCP_1
metaIntf.m m_open_port_cmd_1 [N_REGIONS],
metaIntf.m m_open_con_cmd_1 [N_REGIONS],
metaIntf.m m_close_con_cmd_1 [N_REGIONS],
metaIntf.s s_open_con_sts_1 [N_REGIONS],
metaIntf.s s_open_port_sts_1 [N_REGIONS],
`endif

`ifdef EN_MEM
// Card DMAs
dmaIntf.m m_rd_XDMA_sync,
Expand Down Expand Up @@ -212,6 +229,20 @@ for(genvar i = 0; i < N_REGIONS; i++) begin
.wxfer_host(wxfer_host[i]),
.rd_dest_host(rd_dest_host[i]),
`endif
`ifdef EN_TCP_0
.m_open_port_cmd_0(m_open_port_cmd_0[i]),
.m_open_con_cmd_0(m_open_con_cmd_0[i]),
.m_close_con_cmd_0(m_close_con_cmd_0[i]),
.s_open_con_sts_0(s_open_con_sts_0[i]),
.s_open_port_sts_0(s_open_port_sts_0[i]),
`endif
`ifdef EN_TCP_1
.m_open_port_cmd_1(m_open_port_cmd_1[i]),
.m_open_con_cmd_1(m_open_con_cmd_1[i]),
.m_close_con_cmd_1(m_close_con_cmd_1[i]),
.s_open_con_sts_1(s_open_con_sts_1[i]),
.s_open_port_sts_1(s_open_port_sts_1[i]),
`endif
`ifdef EN_MEM
.m_rd_DDMA(rd_DDMA_arb[i*N_CARD_AXI+:N_CARD_AXI]),
.m_wr_DDMA(wr_DDMA_arb[i*N_CARD_AXI+:N_CARD_AXI]),
Expand Down
35 changes: 35 additions & 0 deletions hw/hdl/network/stack/network_stack.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -834,6 +834,41 @@ tcp_stack tcp_stack_inst(
.session_count_data(session_count_data)
);

/*
ila_tcp ila_tcp (
.clk(nclk), // input wire clk
.probe0(s_tcp_open_req.valid), // 1
.probe1(s_tcp_open_req.ready), // 1
.probe2(m_tcp_open_rsp.valid), // 1
.probe3(m_tcp_open_rsp.ready), // 1
.probe4(m_axis_tcp_rx.tvalid), // 1
.probe5(m_axis_tcp_rx.tready), // 1
.probe6(s_tcp_close_req.valid), // 1
.probe7(s_tcp_close_req.ready), // 1
.probe8(s_axis_tcp_tx.tvalid), //1
.probe9(s_axis_tcp_tx.tready),//1
.probe10(s_tcp_tx_meta.valid),//1
.probe11(s_tcp_tx_meta.ready),//1
.probe12(m_tcp_tx_stat.valid),//1
.probe13(m_tcp_tx_stat.ready), //1
.probe14(m_tcp_notify.valid), //1
.probe15(m_tcp_notify.ready), //1
.probe16(m_tcp_listen_rsp.valid), // 1
.probe17(m_tcp_listen_rsp.ready), // 1
.probe18(s_tcp_listen_req.valid), // 1
.probe19(s_tcp_listen_req.ready), //1
.probe20(m_tcp_rx_meta.valid), // 1
.probe21(m_tcp_rx_meta.ready), // 1
.probe22(s_tcp_rd_pkg.valid), // 1
.probe23(s_tcp_rd_pkg.ready), //1
.probe24(s_tcp_listen_req.data), // 16
.probe25(m_tcp_listen_rsp.data), // 8
.probe26(m_tcp_open_rsp.data), // 72
.probe27(s_tcp_open_req.data) // 48
);*/

`endif
end

Expand Down
152 changes: 76 additions & 76 deletions hw/hdl/network/tcp/tcp_ccross.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -38,11 +38,11 @@ import lynxTypes::*;
*/
module tcp_ccross (
// Network
metaIntf.m m_tcp_listen_req_nclk,
metaIntf.s s_tcp_listen_rsp_nclk,
metaIntf.m m_tcp_open_req_nclk,
metaIntf.s s_tcp_open_rsp_nclk,
metaIntf.m m_tcp_close_req_nclk,
// metaIntf.m m_tcp_listen_req_nclk,
// metaIntf.s s_tcp_listen_rsp_nclk,
// metaIntf.m m_tcp_open_req_nclk,
// metaIntf.s s_tcp_open_rsp_nclk,
// metaIntf.m m_tcp_close_req_nclk,
metaIntf.s s_tcp_notify_nclk,
metaIntf.m m_tcp_rd_pkg_nclk,
metaIntf.s s_tcp_rx_meta_nclk,
Expand All @@ -52,11 +52,11 @@ module tcp_ccross (
AXI4S.s s_axis_tcp_rx_nclk,

// User
metaIntf.s s_tcp_listen_req_aclk,
metaIntf.m m_tcp_listen_rsp_aclk,
metaIntf.s s_tcp_open_req_aclk,
metaIntf.m m_tcp_open_rsp_aclk,
metaIntf.s s_tcp_close_req_aclk,
// metaIntf.s s_tcp_listen_req_aclk,
// metaIntf.m m_tcp_listen_rsp_aclk,
// metaIntf.s s_tcp_open_req_aclk,
// metaIntf.m m_tcp_open_rsp_aclk,
// metaIntf.s s_tcp_close_req_aclk,
metaIntf.m m_tcp_notify_aclk,
metaIntf.s s_tcp_rd_pkg_aclk,
metaIntf.m m_tcp_rx_meta_aclk,
Expand All @@ -75,72 +75,72 @@ module tcp_ccross (
// Crossings
// ---------------------------------------------------------------------------------------------------

// Port request and responses
axis_clock_converter_tcp_16 inst_ccross_tcp_listen_req (
.m_axis_aclk(nclk),
.s_axis_aclk(aclk),
.s_axis_aresetn(aresetn),
.m_axis_aresetn(nresetn),
.s_axis_tvalid(s_tcp_listen_req_aclk.valid),
.s_axis_tready(s_tcp_listen_req_aclk.ready),
.s_axis_tdata (s_tcp_listen_req_aclk.data),
.m_axis_tvalid(m_tcp_listen_req_nclk.valid),
.m_axis_tready(m_tcp_listen_req_nclk.ready),
.m_axis_tdata (m_tcp_listen_req_nclk.data)
);

axis_clock_converter_tcp_8 inst_tcp_listen_rsp (
.m_axis_aclk(aclk),
.s_axis_aclk(nclk),
.s_axis_aresetn(nresetn),
.m_axis_aresetn(aresetn),
.s_axis_tvalid(s_tcp_listen_rsp_nclk.valid),
.s_axis_tready(s_tcp_listen_rsp_nclk.ready),
.s_axis_tdata (s_tcp_listen_rsp_nclk.data),
.m_axis_tvalid(m_tcp_listen_rsp_aclk.valid),
.m_axis_tready(m_tcp_listen_rsp_aclk.ready),
.m_axis_tdata (m_tcp_listen_rsp_aclk.data)
);

// Open, close requests and responses
axis_clock_converter_tcp_48 inst_tcp_open_req (
.m_axis_aclk(nclk),
.s_axis_aclk(aclk),
.s_axis_aresetn(aresetn),
.m_axis_aresetn(nresetn),
.s_axis_tvalid(s_tcp_open_req_aclk.valid),
.s_axis_tready(s_tcp_open_req_aclk.ready),
.s_axis_tdata (s_tcp_open_req_aclk.data),
.m_axis_tvalid(m_tcp_open_req_nclk.valid),
.m_axis_tready(m_tcp_open_req_nclk.ready),
.m_axis_tdata (m_tcp_open_req_nclk.data)
);

axis_clock_converter_tcp_72 inst_tcp_open_rsp (
.m_axis_aclk(aclk),
.s_axis_aclk(nclk),
.s_axis_aresetn(nresetn),
.m_axis_aresetn(aresetn),
.s_axis_tvalid(s_tcp_open_rsp_nclk.valid),
.s_axis_tready(s_tcp_open_rsp_nclk.ready),
.s_axis_tdata (s_tcp_open_rsp_nclk.data),
.m_axis_tvalid(m_tcp_open_rsp_aclk.valid),
.m_axis_tready(m_tcp_open_rsp_aclk.ready),
.m_axis_tdata (m_tcp_open_rsp_aclk.data)
);

axis_clock_converter_tcp_16 inst_tcp_close_req (
.m_axis_aclk(nclk),
.s_axis_aclk(aclk),
.s_axis_aresetn(aresetn),
.m_axis_aresetn(nresetn),
.s_axis_tvalid(s_tcp_close_req_aclk.valid),
.s_axis_tready(s_tcp_close_req_aclk.ready),
.s_axis_tdata (s_tcp_close_req_aclk.data),
.m_axis_tvalid(m_tcp_close_req_nclk.valid),
.m_axis_tready(m_tcp_close_req_nclk.ready),
.m_axis_tdata (m_tcp_close_req_nclk.data)
);
// // Port request and responses
// axis_clock_converter_tcp_16 inst_ccross_tcp_listen_req (
// .m_axis_aclk(nclk),
// .s_axis_aclk(aclk),
// .s_axis_aresetn(aresetn),
// .m_axis_aresetn(nresetn),
// .s_axis_tvalid(s_tcp_listen_req_aclk.valid),
// .s_axis_tready(s_tcp_listen_req_aclk.ready),
// .s_axis_tdata (s_tcp_listen_req_aclk.data),
// .m_axis_tvalid(m_tcp_listen_req_nclk.valid),
// .m_axis_tready(m_tcp_listen_req_nclk.ready),
// .m_axis_tdata (m_tcp_listen_req_nclk.data)
// );

// axis_clock_converter_tcp_8 inst_tcp_listen_rsp (
// .m_axis_aclk(aclk),
// .s_axis_aclk(nclk),
// .s_axis_aresetn(nresetn),
// .m_axis_aresetn(aresetn),
// .s_axis_tvalid(s_tcp_listen_rsp_nclk.valid),
// .s_axis_tready(s_tcp_listen_rsp_nclk.ready),
// .s_axis_tdata (s_tcp_listen_rsp_nclk.data),
// .m_axis_tvalid(m_tcp_listen_rsp_aclk.valid),
// .m_axis_tready(m_tcp_listen_rsp_aclk.ready),
// .m_axis_tdata (m_tcp_listen_rsp_aclk.data)
// );

// // Open, close requests and responses
// axis_clock_converter_tcp_48 inst_tcp_open_req (
// .m_axis_aclk(nclk),
// .s_axis_aclk(aclk),
// .s_axis_aresetn(aresetn),
// .m_axis_aresetn(nresetn),
// .s_axis_tvalid(s_tcp_open_req_aclk.valid),
// .s_axis_tready(s_tcp_open_req_aclk.ready),
// .s_axis_tdata (s_tcp_open_req_aclk.data),
// .m_axis_tvalid(m_tcp_open_req_nclk.valid),
// .m_axis_tready(m_tcp_open_req_nclk.ready),
// .m_axis_tdata (m_tcp_open_req_nclk.data)
// );

// axis_clock_converter_tcp_72 inst_tcp_open_rsp (
// .m_axis_aclk(aclk),
// .s_axis_aclk(nclk),
// .s_axis_aresetn(nresetn),
// .m_axis_aresetn(aresetn),
// .s_axis_tvalid(s_tcp_open_rsp_nclk.valid),
// .s_axis_tready(s_tcp_open_rsp_nclk.ready),
// .s_axis_tdata (s_tcp_open_rsp_nclk.data),
// .m_axis_tvalid(m_tcp_open_rsp_aclk.valid),
// .m_axis_tready(m_tcp_open_rsp_aclk.ready),
// .m_axis_tdata (m_tcp_open_rsp_aclk.data)
// );

// axis_clock_converter_tcp_16 inst_tcp_close_req (
// .m_axis_aclk(nclk),
// .s_axis_aclk(aclk),
// .s_axis_aresetn(aresetn),
// .m_axis_aresetn(nresetn),
// .s_axis_tvalid(s_tcp_close_req_aclk.valid),
// .s_axis_tready(s_tcp_close_req_aclk.ready),
// .s_axis_tdata (s_tcp_close_req_aclk.data),
// .m_axis_tvalid(m_tcp_close_req_nclk.valid),
// .m_axis_tready(m_tcp_close_req_nclk.ready),
// .m_axis_tdata (m_tcp_close_req_nclk.data)
// );

// Notifications
axis_clock_converter_tcp_88 inst_tcp_notify (
Expand Down
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