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Cranelift: Reassociate long and narrow chains of operations into shal…
…low and wide trees (bytecodealliance#7466) This increases instruction-level parallelism and shrinks live ranges. It also canonicalizes into the shallow-and-wide form for reassociating constants together for cprop. Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Trevor Elliott <telliott@fastly.com>
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cranelift/filetests/filetests/egraph/associative-and-commutative.clif
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,81 @@ | ||
test optimize | ||
set opt_level=speed | ||
target x86_64 | ||
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function %iadd_shallow_and_wide(i32, i32, i32, i32) -> i32 { | ||
block0(v0: i32, v1: i32, v2: i32, v3: i32): | ||
v4 = iadd v0, v1 | ||
v5 = iadd v4, v2 | ||
v6 = iadd v5, v3 | ||
return v6 | ||
; check: v4 = iadd v0, v1 | ||
; nextln: v7 = iadd v2, v3 | ||
; nextln: v8 = iadd v4, v7 | ||
; check: return v8 | ||
} | ||
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function %iadd_shallow_and_wide_twice(i32, i32, i32, i32, i32, i32) -> i32 { | ||
block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32): | ||
v6 = iadd v0, v1 | ||
v7 = iadd v6, v2 | ||
v8 = iadd v7, v3 | ||
v9 = iadd v8, v4 | ||
v10 = iadd v9, v5 | ||
return v10 | ||
; check: v6 = iadd v0, v1 | ||
; nextln: v11 = iadd v2, v3 | ||
; nextln: v12 = iadd v6, v11 | ||
; nextln: v16 = iadd v4, v5 | ||
; nextln: v23 = iadd v12, v16 | ||
; nextln: return v23 | ||
} | ||
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function %iadd_reassociate_then_cprop(i32, i32) -> i32 { | ||
block0(v0: i32, v1: i32): | ||
v2 = iconst.i32 42 | ||
v3 = iconst.i32 36 | ||
v4 = iadd v0, v2 | ||
v5 = iadd v1, v3 | ||
v6 = iadd v4, v5 | ||
return v6 | ||
; check: v7 = iadd v0, v1 | ||
; nextln: iconst.i32 78 | ||
; nextln: v16 = iadd v7, v14 ; v14 = 78 | ||
; check: return v16 | ||
} | ||
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function %imul_shallow_and_wide(i32, i32, i32, i32) -> i32 { | ||
block0(v0: i32, v1: i32, v2: i32, v3: i32): | ||
v4 = imul v0, v1 | ||
v5 = imul v4, v2 | ||
v6 = imul v5, v3 | ||
return v6 | ||
; check: v4 = imul v0, v1 | ||
; nextln: v7 = imul v2, v3 | ||
; nextln: v8 = imul v4, v7 | ||
; check: return v8 | ||
} | ||
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function %band_shallow_and_wide(i32, i32, i32, i32) -> i32 { | ||
block0(v0: i32, v1: i32, v2: i32, v3: i32): | ||
v4 = band v0, v1 | ||
v5 = band v4, v2 | ||
v6 = band v5, v3 | ||
return v6 | ||
; check: v4 = band v0, v1 | ||
; nextln: v7 = band v2, v3 | ||
; nextln: v8 = band v4, v7 | ||
; check: return v8 | ||
} | ||
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function %bxor_shallow_and_wide(i32, i32, i32, i32) -> i32 { | ||
block0(v0: i32, v1: i32, v2: i32, v3: i32): | ||
v4 = bxor v0, v1 | ||
v5 = bxor v4, v2 | ||
v6 = bxor v5, v3 | ||
return v6 | ||
; check: v4 = bxor v0, v1 | ||
; nextln: v7 = bxor v2, v3 | ||
; nextln: v8 = bxor v4, v7 | ||
; check: return v8 | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -53,4 +53,3 @@ block0: | |
; v5 = icmp ne v2, v3 ; v3 = 0 | ||
; return v5 | ||
; } | ||
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