[Xtensa] Fix wchar type. Add absent IR passes.

espressif · Nov 13, 2023 · 28bc39e · 28bc39e
1 parent 3ed29bb
commit 28bc39e
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Showing 4 changed files with 16 additions and 15 deletions.
diff --git a/clang/lib/Basic/Targets/Xtensa.h b/clang/lib/Basic/Targets/Xtensa.h
@@ -46,7 +46,7 @@ class LLVM_LIBRARY_VISIBILITY XtensaTargetInfo : public TargetInfo {
     SizeType = UnsignedInt;
     PtrDiffType = SignedInt;
     IntPtrType = SignedInt;
-    WCharType = UnsignedChar;
+    WCharType = SignedInt;
     WIntType = UnsignedInt;
     UseZeroLengthBitfieldAlignment = true;
     MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;

diff --git a/clang/test/Preprocessor/init.c b/clang/test/Preprocessor/init.c
@@ -2790,7 +2790,7 @@
 // XTENSA: #define __SIZEOF_PTRDIFF_T__ 4
 // XTENSA: #define __SIZEOF_SHORT__ 2
 // XTENSA: #define __SIZEOF_SIZE_T__ 4
-// XTENSA: #define __SIZEOF_WCHAR_T__ 1
+// XTENSA: #define __SIZEOF_WCHAR_T__ 4
 // XTENSA: #define __SIZEOF_WINT_T__ 4
 // XTENSA: #define __SIZE_FMTX__ "X"
 // XTENSA: #define __SIZE_FMTo__ "o"
@@ -2895,10 +2895,9 @@
 // XTENSA: #define __UINT_LEAST8_FMTx__ "hhx"
 // XTENSA: #define __UINT_LEAST8_MAX__ 255
 // XTENSA: #define __UINT_LEAST8_TYPE__ unsigned char
-// XTENSA: #define __WCHAR_MAX__ 255
-// XTENSA: #define __WCHAR_TYPE__ unsigned char
-// XTENSA: #define __WCHAR_UNSIGNED__ 1
-// XTENSA: #define __WCHAR_WIDTH__ 8
+// XTENSA: #define __WCHAR_MAX__ 2147483647
+// XTENSA: #define __WCHAR_TYPE__ int
+// XTENSA: #define __WCHAR_WIDTH__ 32
 // XTENSA: #define __WINT_MAX__ 4294967295U
 // XTENSA: #define __WINT_TYPE__ unsigned int
 // XTENSA: #define __WINT_UNSIGNED__ 1
@@ -3093,7 +3092,7 @@
 // XTENSA_FAST32: #define __SIZEOF_PTRDIFF_T__ 4
 // XTENSA_FAST32: #define __SIZEOF_SHORT__ 2
 // XTENSA_FAST32: #define __SIZEOF_SIZE_T__ 4
-// XTENSA_FAST32: #define __SIZEOF_WCHAR_T__ 1
+// XTENSA_FAST32: #define __SIZEOF_WCHAR_T__ 4
 // XTENSA_FAST32: #define __SIZEOF_WINT_T__ 4
 // XTENSA_FAST32: #define __SIZE_FMTX__ "X"
 // XTENSA_FAST32: #define __SIZE_FMTo__ "o"
@@ -3198,10 +3197,9 @@
 // XTENSA_FAST32: #define __UINT_LEAST8_FMTx__ "hhx"
 // XTENSA_FAST32: #define __UINT_LEAST8_MAX__ 255
 // XTENSA_FAST32: #define __UINT_LEAST8_TYPE__ unsigned char
-// XTENSA_FAST32: #define __WCHAR_MAX__ 255
-// XTENSA_FAST32: #define __WCHAR_TYPE__ unsigned char
-// XTENSA_FAST32: #define __WCHAR_UNSIGNED__ 1
-// XTENSA_FAST32: #define __WCHAR_WIDTH__ 8
+// XTENSA_FAST32: #define __WCHAR_MAX__ 2147483647
+// XTENSA_FAST32: #define __WCHAR_TYPE__ int
+// XTENSA_FAST32: #define __WCHAR_WIDTH__ 32
 // XTENSA_FAST32: #define __WINT_MAX__ 4294967295U
 // XTENSA_FAST32: #define __WINT_TYPE__ unsigned int
 // XTENSA_FAST32: #define __WINT_UNSIGNED__ 1

diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -132,7 +132,10 @@ bool XtensaPassConfig::addInstSelector() {
   return false;
 }
 
-void XtensaPassConfig::addIRPasses() { addPass(createAtomicExpandPass()); }
+void XtensaPassConfig::addIRPasses() {
+    addPass(createAtomicExpandPass());
+    TargetPassConfig::addIRPasses();
+}
 
 void XtensaPassConfig::addPreRegAlloc() {
   addPass(createXtensaHardwareLoops());

diff --git a/llvm/test/CodeGen/Xtensa/ee-intrinsics-loop.ll b/llvm/test/CodeGen/Xtensa/ee-intrinsics-loop.ll
@@ -69,7 +69,7 @@ for.body:                                         ; preds = %entry, %for.body
 ; CHECK-NEXT:	ee.stf.128.ip	 f11, f10, f9, f8, a8, 16
 ; CHECK-NEXT:	ee.stf.128.ip	 f8, f8, f8, f8, a8, 16
 ; CHECK-NEXT:	ee.stf.128.xp	 f8, f8, f8, f8, a9, a8
-; CHECK-NEXT:	movi.n	a10, 0
+; CHECK-NEXT:	movi.n	a10, 32
 ; CHECK-NEXT:	movi.n	a11, 10
 ; CHECK-NEXT: .LBB0_1:                                # %for.body
 ; CHECK-NEXT:                                       # =>This Inner Loop Header: Depth=1
@@ -79,8 +79,8 @@ for.body:                                         ; preds = %entry, %for.body
 ; CHECK-NEXT:  ee.vmulas.s16.accx.ld.xp.qup     q4, a8, a9, q0, q4, q2, q3
 ; CHECK-NEXT:  ee.ld.128.usar.xp        q4, a8, a9
 ; CHECK-NEXT:  ee.vmulas.s16.accx.ld.ip.qup     q3, a8, 16, q0, q3, q4, q2
-; CHECK-NEXT:  addi.n  a10, a10, 1
-; CHECK-NEXT:  bnei    a10, 32, .LBB0_1
+; CHECK-NEXT:  addi.n  a10, a10, -1
+; CHECK-NEXT:  bnez    a10, .LBB0_1
 ; CHECK-NEXT: # %bb.2:                                # %for.cond.cleanup
 ; CHECK-NEXT:  movi.n  a8, 0
 ; CHECK-NEXT:  wur.sar_byte     a8