docs: Migrate esp32 errata

espressif · Oct 10, 2024 · d833da9 · d833da9
1 parent 42deccc
commit d833da9
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Showing 85 changed files with 2,891 additions and 23 deletions.
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
@@ -17,7 +17,7 @@ variables:
   parallel:
     matrix:
       - DOCLANG: ["en", "zh_CN"]
-        DOCTGT: ["esp32s3", "esp32c6", "esp32h2", "esp32c2", "esp32s2", "esp32c3"]
+        DOCTGT: ["esp32s3", "esp32c6", "esp32h2", "esp32c2", "esp32s2", "esp32c3", "esp32"]
 
 build_errata_html:
   extends:
@@ -152,7 +152,7 @@ check_doc_links:
   parallel:
     matrix:
       - DOCLANG: ["en", "zh_CN"]
-        DOCTGT: ["esp32s2", "esp32s3", "esp32c3", "esp32c6", "esp32h2", "esp32c2"]
+        DOCTGT: ["esp32s2", "esp32s3", "esp32c3", "esp32c6", "esp32h2", "esp32c2", "esp32"]
 
 check_line_num:
   image: python:3.8

diff --git a/docs/_static/docs_version.js b/docs/_static/docs_version.js
@@ -1,8 +1,12 @@
 var DOCUMENTATION_VERSIONS = {
     DEFAULTS: { has_targets: false,
-                supported_targets: [ "esp32s2" ]
+                supported_targets: [ "esp32" ]
               },
+    VERSIONS: [
+      { name: "latest", has_targets: true, supported_targets: [ "esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c6", "esp32h2", "esp32c2",] },
+    ],
     IDF_TARGETS: [
+       { text: "ESP32", value: "esp32"},
        { text: "ESP32-S2", value: "esp32s2"},
        { text: "ESP32-S3", value: "esp32s3"},
        { text: "ESP32-C3", value: "esp32c3"},

diff --git a/docs/conf_common.py b/docs/conf_common.py
@@ -3,7 +3,7 @@
 from esp_docs.conf_docs import *  # noqa: F403,F401
 
 languages = ['en', 'zh_CN']
-idf_targets = ['esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32c2']
+idf_targets = ['esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32c2', 'esp32']
 extensions += ['sphinx_copybutton',
                # Note: order is important here, events must
                # be registered by one extension before they can be
@@ -56,13 +56,21 @@
                 '03-errata-description/shared/cpu-load-store.rst',
                 'revision-history/esp32h2-revision-history.rst',
                 ]
+ESP32_DOCS = ['01-chip-identification/esp32/*.rst',
+              '02-errata-summary/esp32-errata-summary.rst',
+              '03-errata-description/esp32/*.rst',
+              '03-errata-description/shared/rtc-reg-read-error-from-light-sleep.rst',
+              'revision-history/esp32-revision-history.rst',
+              ]
 
 conditional_include_dict = {'esp32c2':ESP32C2_DOCS,
                             'esp32c3':ESP32C3_DOCS,
                             'esp32c6':ESP32C6_DOCS,
                             'esp32s2':ESP32S2_DOCS,
                             'esp32s3':ESP32S3_DOCS,
-                            'esp32h2':ESP32H2_DOCS}
+                            'esp32h2':ESP32H2_DOCS,
+                            'esp32':ESP32_DOCS
+                            }
 
 # link roles config
 github_repo = 'espressif/esp-chip-errata'

diff --git a/docs/en/01-chip-identification/esp32/chip-marking-identification.rst b/docs/en/01-chip-identification/esp32/chip-marking-identification.rst
@@ -1 +1,17 @@
-:orphan:
+.. list-table:: Chip Revision Identification by Chip Marking
+    :widths: 30 70
+    :header-rows: 1
+    :align: center
+
+    * - Chip Revision
+      - Espressif Tracking Information
+    * - v0.0
+      - XXXXXXXX
+    * - v1.0
+      - X ``B`` XXXXXX
+    * - v1.1
+      - X ``F`` XXXXXX
+    * - v3.0
+      - X ``E`` XXXXXX
+    * - v3.1
+      - X ``G`` XXXXXX
diff --git a/docs/en/01-chip-identification/esp32/efuse-field-identification.rst b/docs/en/01-chip-identification/esp32/efuse-field-identification.rst
@@ -1 +1,49 @@
-:orphan:
+- EFUSE_BLK0_RDATA5[25:24]
+- EFUSE_BLK0_RDATA5[20]
+- EFUSE_BLK0_RDATA3[15]
+- APB_CTRL_DATE[31]
+
+.. flat-table:: Chip Revision Identification by eFuse Bits
+   :header-rows: 2
+   :widths: 2 5 1 1 1 1 1
+
+   * - :rspan:`1`
+     - :rspan:`1` eFuse Bit
+     - :cspan:`4` Chip Revision
+   * - v0.0
+     - v1.0
+     - v1.1
+     - v3.0
+     - v3.1
+   * - :rspan:`2` Major Number
+     - APB_CTRL_DATE[31]
+     - 0
+     - 0
+     - 0
+     - 1
+     - 1
+   * - EFUSE_BLK0_RDATA5[20]
+     - 0
+     - 0
+     - 0
+     - 1
+     - 1
+   * - EFUSE_BLK0_RDATA3[15]
+     - 0
+     - 1
+     - 1
+     - 1
+     - 1
+   * - :rspan:`1` Minor Number
+     - EFUSE_BLK0_RDATA5[25]
+     - 0
+     - 0
+     - 0
+     - 0
+     - 0
+   * - EFUSE_BLK0_RDATA5[24]
+     - 0
+     - 0
+     - 1
+     - 0
+     - 1
diff --git a/docs/en/01-chip-identification/esp32/module-marking-identification.rst b/docs/en/01-chip-identification/esp32/module-marking-identification.rst
@@ -1 +1,19 @@
-:orphan:
+  .. list-table:: Chip Revision Identification by Module Marking
+      :widths: 30 70
+      :header-rows: 1
+      :align: center
+
+      * - Chip Revision
+        - Specification Identifier
+      * - v0.0
+        - XXXXXX \ :sup:`1`
+      * - v1.0
+        - XXXXXX
+      * - v1.1
+        - ``MF`` XXXX
+      * - v3.0
+        - ``ME`` XXXX
+      * - v3.1
+        - ``MG`` XXXX
+
+  \ :sup:`1` To distinguish between v0.0 and v0.1, please check the eFuse bits.
diff --git a/docs/en/01-chip-identification/index.rst b/docs/en/01-chip-identification/index.rst
@@ -24,9 +24,17 @@ Primary Identification Methods
 eFuse Bits
 ++++++++++
 
-The chip revision is encoded using two eFuse fields:
+.. only:: not esp32
 
-.. include:: ./{IDF_TARGET_PATH_NAME}/efuse-field-identification.rst
+    The chip revision is encoded using two eFuse fields:
+
+    .. include:: ./{IDF_TARGET_PATH_NAME}/efuse-field-identification.rst
+
+.. only:: esp32
+
+    The chip revision is encoded using four eFuse fields:
+
+    .. include:: ./{IDF_TARGET_PATH_NAME}/efuse-field-identification.rst
 
 Chip Marking
 ++++++++++++