Housekeeping: fix warnings, rename some examples, etc.

.github/workflows/ci.yml

@@ -342,6 +342,7 @@ jobs:
           - soc: esp32h2
             rust-target: riscv32imac-unknown-none-elf
           # Xtensa devices:
+          - soc: esp32
           - soc: esp32s2
           - soc: esp32s3
 

esp-backtrace/src/lib.rs

@@ -1,9 +1,9 @@
 #![allow(rustdoc::bare_urls, unused_macros)]
 #![cfg_attr(
-    any(nightly_before_2024_06_12, nightly_since_2024_06_12),
+    target_arch = "xtensa",
+    feature(asm_experimental_arch),
     feature(panic_info_message)
 )]
-#![cfg_attr(target_arch = "xtensa", feature(asm_experimental_arch))]
 #![doc = include_str!("../README.md")]
 #![doc(html_logo_url = "https://github.com/avatars/u/46717278")]
 #![no_std]
@@ -159,6 +159,7 @@ unsafe fn __user_exception(cause: arch::ExceptionCause, context: arch::Context)
     #[cfg(feature = "semihosting")]
     semihosting::process::abort();
 
+    #[cfg(not(feature = "semihosting"))]
     halt();
 }
 

esp-hal-embassy/Cargo.toml

@@ -18,8 +18,8 @@ document-features   = "0.2.8"
 embassy-executor    = { version = "0.5.0", optional = true }
 embassy-time-driver = { version = "0.1.0", features = [ "tick-hz-1_000_000" ] }
 esp-hal             = { version = "0.18.0", path = "../esp-hal" }
+log                 = { version = "0.4.22", optional = true }
 portable-atomic     = "1.6.0"
-log = { version = "0.4.22", optional = true }
 
 [build-dependencies]
 cfg-if       = "1.0.0"
@@ -45,3 +45,6 @@ log = ["dep:log"]
 executors = ["dep:embassy-executor"]
 ## Use the executor-integrated `embassy-time` timer queue.
 integrated-timers = ["embassy-executor?/integrated-timers"]
+
+[lints.rust]
+unexpected_cfgs = "allow"

esp-println/Cargo.toml

@@ -23,8 +23,9 @@ portable-atomic  = { version = "1.6.0",  optional = true, default-features = fal
 esp-build = { version = "0.1.0", path = "../esp-build" }
 
 [features]
-default = ["dep:critical-section", "colors", "auto"]
-log     = ["dep:log"]
+default          = ["critical-section", "colors", "auto"]
+critical-section = ["dep:critical-section"]
+log              = ["dep:log"]
 
 # You must enable exactly 1 of the below features to support the correct chip:
 esp32   = []

examples/src/bin/etm_timer.rs

@@ -43,7 +43,7 @@ fn main() -> ! {
             ..Default::default()
         }),
     );
-    let mut timer0 = timg0.timer0;
+    let timer0 = timg0.timer0;
 
     // Configure ETM to stop timer0 when alarm is triggered
     let event = timer0.on_alarm();

examples/src/bin/systimer.rs

@@ -39,17 +39,17 @@ fn main() -> ! {
     println!("SYSTIMER Current value = {}", SystemTimer::now());
 
     critical_section::with(|cs| {
-        let mut alarm0 = systimer.alarm0.into_periodic();
+        let alarm0 = systimer.alarm0.into_periodic();
         alarm0.set_interrupt_handler(systimer_target0);
         alarm0.set_period(1u32.secs());
         alarm0.enable_interrupt(true);
 
-        let mut alarm1 = systimer.alarm1;
+        let alarm1 = systimer.alarm1;
         alarm1.set_interrupt_handler(systimer_target1);
         alarm1.set_target(SystemTimer::now() + (SystemTimer::TICKS_PER_SECOND * 2));
         alarm1.enable_interrupt(true);
 
-        let mut alarm2 = systimer.alarm2;
+        let alarm2 = systimer.alarm2;
         alarm2.set_interrupt_handler(systimer_target2);
         alarm2.set_target(SystemTimer::now() + (SystemTimer::TICKS_PER_SECOND * 3));
         alarm2.enable_interrupt(true);

examples/src/bin/esp_wifi_access_point_with_sta.rs → examples/src/bin/wifi_access_point_with_sta.rs

@@ -47,7 +47,6 @@ const PASSWORD: &str = env!("PASSWORD");
 
 #[entry]
 fn main() -> ! {
-    #[cfg(feature = "log")]
     esp_println::logger::init_logger(log::LevelFilter::Info);
 
     let peripherals = Peripherals::take();

hil-test/tests/aes_dma.rs

@@ -16,7 +16,6 @@ use esp_hal::{
     dma::{Dma, DmaPriority},
     dma_buffers,
     peripherals::Peripherals,
-    prelude::*,
 };
 
 const DMA_BUFFER_SIZE: usize = 16;

hil-test/tests/interrupt.rs

@@ -22,6 +22,7 @@ use esp_hal::{
 
 static SWINT0: Mutex<RefCell<Option<SoftwareInterrupt<0>>>> = Mutex::new(RefCell::new(None));
 
+#[allow(unused)] // TODO: Remove attribute when interrupt latency test re-enabled
 struct Context {
     sw0_trigger_addr: u32,
 }

hil-test/tests/pcnt.rs

@@ -7,8 +7,6 @@
 #![no_std]
 #![no_main]
 
-use core::ops::Deref;
-
 use defmt_rtt as _;
 use esp_backtrace as _;
 use esp_hal::{delay::Delay, gpio::GpioPin, pcnt::Pcnt};
@@ -44,7 +42,7 @@ mod tests {
         let system = SystemControl::new(peripherals.SYSTEM);
         let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
 
-        let mut io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
+        let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
 
         Context {
             pcnt: Pcnt::new(peripherals.PCNT, None),

hil-test/tests/rsa.rs

@@ -148,7 +148,7 @@ mod tests {
         #[cfg(feature = "esp32")]
         {
             let mut rsamulti =
-                RsaMultiplication::<operand_sizes::Op512, esp_hal::Blocking>::new(ctx.rsa);
+                RsaMultiplication::<operand_sizes::Op512, esp_hal::Blocking>::new(&mut ctx.rsa);
             rsamulti.start_multiplication(operand_a, operand_b);
             rsamulti.read_results(&mut outbuf);
         }

hil-test/tests/uart.rs

@@ -100,7 +100,7 @@ mod tests {
 
         #[cfg(not(feature = "esp32s2"))]
         {
-            #[cfg(not(any(feature = "esp32c3", feature = "esp32c2")))]
+            #[cfg(not(any(feature = "esp32", feature = "esp32c3", feature = "esp32c2")))]
             {
                 // 9600 baud, RC FAST clock source:
                 ctx.uart.change_baud(9600, ClockSource::RcFast, &ctx.clocks);
@@ -110,17 +110,21 @@ mod tests {
             }
 
             // 19,200 baud, XTAL clock source:
-            ctx.uart.change_baud(19_200, ClockSource::Xtal, &ctx.clocks);
-            ctx.uart.write(55).ok();
-            let read = block!(ctx.uart.read());
-            assert_eq!(read, Ok(55));
+            #[cfg(not(feature = "esp32"))]
+            {
+                ctx.uart.change_baud(19_200, ClockSource::Xtal, &ctx.clocks);
+                ctx.uart.write(55).ok();
+                let read = block!(ctx.uart.read());
+                assert_eq!(read, Ok(55));
+            }
 
             // 921,600 baud, APB clock source:
             ctx.uart.change_baud(921_600, ClockSource::Apb, &ctx.clocks);
             ctx.uart.write(253).ok();
             let read = block!(ctx.uart.read());
             assert_eq!(read, Ok(253));
         }
+
         #[cfg(feature = "esp32s2")]
         {
             // 9600 baud, REF TICK clock source: