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Fix illegal insn comb loop (#9)
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@davidmallasen
davidmallasen committed Jul 23, 2024
1 parent 8855cbb commit c71c4e4
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Showing 3 changed files with 30 additions and 12 deletions.
6 changes: 6 additions & 0 deletions rtl/cv32e40px_controller.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -112,6 +112,7 @@ module cv32e40px_controller import cv32e40px_pkg::*;

// X-IF signals
output logic x_branch_or_async_taken_o,
output logic x_control_illegal_reset_o,

// jump/branch signals
input logic branch_taken_ex_i, // branch taken signal from EX ALU
Expand Down Expand Up @@ -331,6 +332,7 @@ module cv32e40px_controller import cv32e40px_pkg::*;
hwlp_targ_addr_o = ((hwlp_start1_leq_pc && hwlp_end1_geq_pc) && !(hwlp_start0_leq_pc && hwlp_end0_geq_pc)) ? hwlp_start_addr_i[1] : hwlp_start_addr_i[0];

x_branch_or_async_taken_o = 1'b0;
x_control_illegal_reset_o = 1'b0;

unique case (ctrl_fsm_cs)
// We were just reset, wait for fetch_enable
Expand Down Expand Up @@ -543,6 +545,7 @@ module cv32e40px_controller import cv32e40px_pkg::*;
halt_id_o = 1'b0;
ctrl_fsm_ns = id_ready_i ? FLUSH_EX : DECODE;
illegal_insn_n = 1'b1;
x_control_illegal_reset_o = 1'b1;

end else begin

Expand Down Expand Up @@ -688,6 +691,7 @@ module cv32e40px_controller import cv32e40px_pkg::*;
illegal_insn_i | ecall_insn_i:
begin
ctrl_fsm_ns = FLUSH_EX;
x_control_illegal_reset_o = illegal_insn_i;
end

(~ebrk_force_debug_mode & ebrk_insn_i):
Expand Down Expand Up @@ -779,6 +783,7 @@ module cv32e40px_controller import cv32e40px_pkg::*;
halt_id_o = 1'b1;
ctrl_fsm_ns = FLUSH_EX;
illegal_insn_n = 1'b1;
x_control_illegal_reset_o = 1'b1;

end else begin

Expand Down Expand Up @@ -876,6 +881,7 @@ module cv32e40px_controller import cv32e40px_pkg::*;
illegal_insn_i | ecall_insn_i:
begin
ctrl_fsm_ns = FLUSH_EX;
x_control_illegal_reset_o = illegal_insn_i;
end

(~ebrk_force_debug_mode & ebrk_insn_i):
Expand Down
19 changes: 11 additions & 8 deletions rtl/cv32e40px_id_stage.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -437,6 +437,7 @@ module cv32e40px_id_stage
logic illegal_insn;
logic x_illegal_insn;
logic x_branch_or_async_taken;
logic x_control_illegal_reset;
logic [4:0] waddr_id;
logic [4:0] waddr_ex;
logic [4:0] waddr_wb;
Expand Down Expand Up @@ -1137,14 +1138,15 @@ module cv32e40px_id_stage
.wb_ready_i (wb_ready_i),

// additional status signals
.x_stall_o (x_stall),
.x_illegal_insn_o (x_illegal_insn),
.x_illegal_insn_dec_i(illegal_insn_dec),
.id_ready_i (id_ready_o),
.ex_valid_i (ex_valid_i),
.ex_ready_i (ex_ready_i),
.current_priv_lvl_i (current_priv_lvl_i),
.data_req_dec_i (data_req_id)
.x_stall_o (x_stall),
.x_illegal_insn_o (x_illegal_insn),
.x_illegal_insn_dec_i (illegal_insn_dec),
.x_control_illegal_reset_i(x_control_illegal_reset),
.id_ready_i (id_ready_o),
.ex_valid_i (ex_valid_i),
.ex_ready_i (ex_ready_i),
.current_priv_lvl_i (current_priv_lvl_i),
.data_req_dec_i (data_req_id)
);


Expand Down Expand Up @@ -1447,6 +1449,7 @@ module cv32e40px_id_stage

.apu_stall_o(apu_stall),
.x_branch_or_async_taken_o(x_branch_or_async_taken),
.x_control_illegal_reset_o(x_control_illegal_reset),

// jump/branch control
.branch_taken_ex_i (branch_taken_ex),
Expand Down
17 changes: 13 additions & 4 deletions rtl/cv32e40px_x_disp.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,7 @@ module cv32e40px_x_disp
output logic x_stall_o,
output logic x_illegal_insn_o,
input logic x_illegal_insn_dec_i,
input logic x_control_illegal_reset_i,
input logic id_ready_i,
input logic ex_valid_i,
input logic ex_ready_i,
Expand All @@ -108,6 +109,7 @@ module cv32e40px_x_disp
logic x_if_memory_instr;
logic illegal_forwarding_prevention;
logic x_issue_illegal;
logic x_illegal_insn_q, x_illegal_insn_n;

// issue interface
assign x_issue_valid_o = x_illegal_insn_dec_i & ~branch_or_jump_i & ~instr_offloaded_q & instr_valid_i & ~illegal_forwarding_prevention;
Expand Down Expand Up @@ -182,7 +184,7 @@ module cv32e40px_x_disp
assign x_wb_fwd_o[3] = (x_rs_addr_i[0] | 5'b00001) == waddr_wb_i & we_wb_i & ex_valid_i & x_issue_resp_dualread_i[0];
assign x_wb_fwd_o[4] = (x_rs_addr_i[1] | 5'b00001) == waddr_wb_i & we_wb_i & ex_valid_i & x_issue_resp_dualread_i[1];
assign x_wb_fwd_o[5] = (x_rs_addr_i[2] | 5'b00001) == waddr_wb_i & we_wb_i & ex_valid_i & x_issue_resp_dualread_i[2];
assign dep = ~x_illegal_insn_o & ((regs_used_i[0] & scoreboard_q[x_rs_addr_i[0]] & (x_result_rd_i != x_rs_addr_i[0]))
assign dep = ~x_illegal_insn_n & ((regs_used_i[0] & scoreboard_q[x_rs_addr_i[0]] & (x_result_rd_i != x_rs_addr_i[0]))
| (regs_used_i[1] & scoreboard_q[x_rs_addr_i[1]] & (x_result_rd_i != x_rs_addr_i[1]))
| (regs_used_i[2] & scoreboard_q[x_rs_addr_i[2]] & (x_result_rd_i != x_rs_addr_i[2]))
| (((regs_used_i[0] & x_issue_resp_dualread_i[0]) & scoreboard_q[x_rs_addr_i[0] | 5'b00001] & (x_result_rd_i != (x_rs_addr_i[0] | 5'b00001))) & x_issue_resp_dualread_i[0])
Expand All @@ -195,7 +197,7 @@ module cv32e40px_x_disp
assign x_wb_fwd_o[0] = x_rs_addr_i[0] == waddr_wb_i & we_wb_i & ex_valid_i;
assign x_wb_fwd_o[1] = x_rs_addr_i[1] == waddr_wb_i & we_wb_i & ex_valid_i;
assign x_wb_fwd_o[2] = x_rs_addr_i[2] == waddr_wb_i & we_wb_i & ex_valid_i;
assign dep = ~x_illegal_insn_o & ((regs_used_i[0] & scoreboard_q[x_rs_addr_i[0]] & (x_result_rd_i != x_rs_addr_i[0]))
assign dep = ~x_illegal_insn_n & ((regs_used_i[0] & scoreboard_q[x_rs_addr_i[0]] & (x_result_rd_i != x_rs_addr_i[0]))
| (regs_used_i[1] & scoreboard_q[x_rs_addr_i[1]] & (x_result_rd_i != x_rs_addr_i[1]))
| (regs_used_i[2] & scoreboard_q[x_rs_addr_i[2]] & (x_result_rd_i != x_rs_addr_i[2])));
end
Expand Down Expand Up @@ -247,11 +249,12 @@ module cv32e40px_x_disp
// illegal instruction assignment
assign x_issue_illegal = x_illegal_insn_dec_i & ~instr_offloaded_q & instr_valid_i;
always_comb begin
x_illegal_insn_o = 1'b0;
x_illegal_insn_n = 1'b0;
if (x_issue_illegal & x_issue_ready_i & ~x_issue_resp_accept_i) begin
x_illegal_insn_o = 1'b1;
x_illegal_insn_n = 1'b1;
end
end
assign x_illegal_insn_o = x_illegal_insn_q;

// scoreboard and status signal register
always_ff @(posedge clk_i or negedge rst_ni) begin
Expand All @@ -260,11 +263,17 @@ module cv32e40px_x_disp
instr_offloaded_q <= 1'b0;
id_q <= '0;
mem_counter_q <= '0;
x_illegal_insn_q <= 1'b0;
end else begin
scoreboard_q <= scoreboard_d;
instr_offloaded_q <= instr_offloaded_d;
id_q <= id_d;
mem_counter_q <= mem_counter_d;
if (x_control_illegal_reset_i) begin
x_illegal_insn_q <= 1'b0;
end else begin
x_illegal_insn_q <= x_illegal_insn_n;
end
end
end

Expand Down

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