[JIT] ARM64 - Optimize x < 0 and x >= 0

[TIHan]

Description

#43440

As for handling GT_GE, I do not think it is worth doing the optimization in the non-conditional case. It would require neg and a lsr which I believe would be slower than just the cmp and cset. According to A78, the pair of cmp and cset instructions are accelerated through instruction fusion - so it's probably only worth replacing them if we can do it in just one instruction.

Acceptance Criteria

• Write follow-up - ARM64 - Follow-up on x < 0 and x >= 0 #83562

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Issue Details

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Addresses the first case of #43440

As for handling GT_GE, I do not think it is worth it. It would require neg and a lsr which I believe would be slower than just the cmp and cset. According to A78, the pair of cmp and cset instructions are accelerated through instruction fusion - so it's probably only worth replacing them if we can do it in just one.

Author:	TIHan
Assignees:	TIHan
Labels:	area-CodeGen-coreclr
Milestone:	-

[jakobbotsch]

LGTM with one fix

[TIHan]

I'm going to do another round for this optimization, filed #83562 to track it.

Therefore, I will go ahead and merge this one.