[RISC-V] Add missed instructions (#99948)

In genInstrWithConstant, loadType and zero-extends are missed. - lbu, lhu and lwu
dotnet · Mar 20, 2024 · 589beb0 · 589beb0
1 parent 90a0fc1
commit 589beb0
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/src/coreclr/jit/codegenriscv64.cpp b/src/coreclr/jit/codegenriscv64.cpp
@@ -80,6 +80,9 @@ bool CodeGen::genInstrWithConstant(instruction ins,
         case INS_flw:
         case INS_ld:
         case INS_fld:
+        case INS_lbu:
+        case INS_lhu:
+        case INS_lwu:
             break;
 
         default: