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firrtl
firrtl PublicForked from chipsalliance/firrtl
Flexible Intermediate Representation for RTL
Scala
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riscv-v-spec
riscv-v-spec PublicForked from riscv/riscv-v-spec
Working draft of the proposed RISC-V V vector extension
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chisel-template
chisel-template PublicForked from chipsalliance/chisel-template
A template project for beginning new Chisel work
Scala
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chisel3
chisel3 PublicForked from chipsalliance/chisel
Chisel 3: A Modern Hardware Design Language
Scala
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