Chisel v5.2.0
Features
- Add Instance.suggestName (backport #2886) (by @mergify[bot] in #3724)
AddssuggestName
API for hierarchy instances. - Make
SRAMInterface
parameters publicly available (backport #3826) (by @mergify[bot] in #3827)
memSize
,dataType
,numReadPorts
,numWritePorts
,numReadwritePorts
,masked
parameters are now visible forSRAMInterface
. - Add requireIsAnnotatable for better errors when annotating literals (backport #3968) (by @mergify[bot] in #3970)
This gives much better error messages when accidentally dontTouching a literal
Backend Code Generation
- Don't emit nodes when calling .asBool on a Bool (backport #3637) (by @mergify[bot] in #3639)
This results in a slight improvement to emitted FIRRTL quality
Fixes
- Fix using Definitions as arguments to Definitions (backport #3726) (by @mergify[bot] in #3731)
Fixes #3708 - Support === on empty Aggregates (backport #3747) (by @mergify[bot] in #3750)
- Fix
Reg()
to properly handle clocks as rvalues (backport #3775) (by @mergify[bot] in #3779)- Clocks are now properly supported by
DataView
(includingFlatIO
) - Users will also received better error messages when providing invalid clocks to
Reg()
- Clocks are now properly supported by
- Report source locator in when scoping error messages (backport #3804) (by @mergify[bot] in #3807)
- [svsim] Better error message when verilator not on PATH (backport #3829) (by @mergify[bot] in #3832)
- [svsim] Make EphemeralSimulator multi-processing friendly (backport #3847) (by @mergify[bot] in #3848)
- Grab a unique temporary directory for every invocation using Java API
- Allow multiple EphemeralSimulators to run in the same JVM (no longer necessary to single-thread)
- Use pure Scala code to recursively delete directory at end rather than platform specific
rm -rf
- Get ChiselSim working with CIRCT 1.66+ (backport #3890) (by @mergify[bot] in #3891)
- Support serializing large (> 2 GiB) annotation files (backport #3905) (by @mergify[bot] in #3906)
- Fix ChiselStage and Builder handling of logging (backport #3895) (by @mergify[bot] in #3897)
- Adds support for
--log-level
tocirct.stage.ChiselStage
- Previously,
object circt.stage.ChiselStage
was ignoring the Logger. - Also, Chisel was not creating its own logger scope which could lead to clobbering of the Console when running invoking Chisel in the same process multiple times.
- Adds support for
- toBigInt should round identically for Double and BigDecimal (backport #3921) (by @mergify[bot] in #3926)
- Fix Data.findFirstTypeMismatch to check all elements of Bundles (backport #3928) (by @mergify[bot] in #3929)
FixesDataMirror.checkTypeEquivalence
to actually check all fields of Bundles and Records. This may expose latent bugs in user code. - Support literals in DataView (backport #3964) (by @mergify[bot] in #3965)
View of literals will now themselves be literals. This also fixes an internal bug related to views of literals. - Fix === for abstract Reset types (backport #3979) (by @mergify[bot] in #3981)
Previously, the function would infinitely recurse resulting in a stack overflow. - Provide require message for negative widths (backport #4008) (by @mergify[bot] in #4009)
Fixes #4007 - Remove extra bit from
SRAMInterface
address width (backport #3830) (by @mergify[bot] in #3839)
Documentation
- Update CONTRIBUTING.md (backport #3785) (by @mergify[bot] in #3787)
Update CONTRIBUTING instructions to clarify backport process and branch to target. - [website] Update chisel-template repo link to chipsalliance (backport #3871) (by @mergify[bot] in #3873)
- Rename Scala CLI template to example (backport #3917) (by @mergify[bot] in #3919)
Existing links tohttps://github.com/chipsalliance/chisel/releases/latest/download/chisel-template.scala
should instead usehttps://github.com/chipsalliance/chisel/releases/latest/download/chisel-example.scala
Dependency Updates
- Add Scala 2.13.13 to cross-build (backport #3851) (by @mergify[bot] in #3863)
- Use c++14 to pass the verilator check (backport #3876) (by @mergify[bot] in #3913)
Change ChiselSim to requires a C++14 compiler.
Build and Internal Changes
- [5.x] Enable MiMa for v5.1.0 (by @chiselbot in #3633)
- Update Scala CLI Template (backport #3757) (by @mergify[bot] in #3759)
- Use "dep" instead of deprecated "lib"
- Move ChiselStage import above
import chisel3._
- This makes users less likely to run into issues adding
import chisel3.util._
- This makes users less likely to run into issues adding
- Bump versions in Github workflows
- Enhance release notes automation (backport #3751) (by @mergify[bot] in #3777)
- Bump
mikepenz/release-changelog-builder-action
to v4.1.1 - It now tabs every line included in the Release Notes section of the PR template
- Bump
Full Changelog: v5.1.0...v5.2.0