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Add TriCore Architecture #1973
Add TriCore Architecture #1973
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Very nice work! From which llvm is this, please?
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Is that unmaintained repo?
…On Sat, Mar 11, 2023, 05:49 billow ***@***.***> wrote:
Very nice work! From which llvm is this, please?
Maybe https://github.com/TriDis/llvm-tricore
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Yes, and I meant to use this as a starting point only. We could probably maintain TriCore's TableGen and TriCoreDisassembler code ourselves. |
Can we assume that this arch is no longer developed? (Unlike Arm, x86, etc)
…On Sat, Mar 11, 2023, 06:19 billow ***@***.***> wrote:
Yes, and I meant to use this as a starting point only. We could probably
maintain TriCore's TableGen and TriCoreDisassembler code ourselves.
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I think it's just not as widely used. |
ping @XVilka |
@imbillow @imbillow this arch is indeed not widely used but quite common in the automotive and few other industries. This architecture is still being improved with ISA changes slightly from version to version, latest one being 1.6.2: The aforementioned LLVM fork isn't complete and abandoned, and Infineon didn't indicate that they plan to implement Tricore support in the mainline LLVM or even some open fork. Thus, I suggest we focus only on the capstone and maintain it separately from the LLVM things. |
@imbillow note, there are slight differences for some instructions between different ISA versions, we should add the way to specify the particular ISA in the API. |
@Rot127 could you please also take a look, in case it will interfere with the auto-sync work? |
@XVilka Looks good to me. |
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plz check CIFuzz.
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Could you please check my messages in Rizins Mattermost? Depending what you say regarding the |
There should be special handling for different versions of ISA that hasn't been done yet. Currently, only TC1.6.2 is being referenced. Also, the testing may not be comprehensive enough, and I feel that there are still quite a few bugs present. |
@imbillow could you please also maintain a very brief TODO/status in the PR description? |
done |
Now our disassembled mnemonic and op_str are pretty good, but inst_detail is not quite as good |
@kabeor could you please take a look at this to give the early feedback, since majority of the code was written, also to allow the CI jobs to run? |
@imbillow see also:
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Because I'm not very familiar with Python 2, so I converted the However, the |
@kabeor what do you think about such script conversion? |
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Then we can merge |
Co-authored-by: Rot127 <45763064+Rot127@users.noreply.github.com>
@kabeor Hi, the problem you mentioned has been fixed, please review again. |
@kabeor looks like conflict was resolved 😁 |
Thanks again for this great work! Merged. |
this is what i am planning to do. anything else do you think should be merged before rc3 tag? |
yes, please make pull req for the above issues before rc3 tag. my main concern now is that the Pypi package is still properly generated for all platforms. |
@aquynh Would agree with releasing |
yes the auto-sync is a big change, so I want to release 5.0 before merging that. |
@@ -708,6 +726,8 @@ def __gen_detail(self): | |||
(self.operands) = bpf.get_arch_info(self._raw.detail.contents.arch.bpf) | |||
elif arch == CS_ARCH_RISCV: | |||
(self.operands) = riscv.get_arch_info(self._raw.detail.contents.arch.riscv) | |||
elif arch == CS_ARCH_TRICORE: | |||
(self.operands) = riscv.get_arch_info(self._raw.detail.contents.arch.tricore) |
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Should this be tricore.get_arch_info
instead of riscv.get_arch_info
?
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You are right
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@peace-maker Could you please send a new PR to fix these errors?
Changes based on https://github.com/TriDis/capstone/tree/tricore, adaptations for new capstone versions and support for current versions of the TriCore instruction set.
The current
tc1.6.2
version of instruction set disassembly is almost complete. Other versions actually overlap withtc1.6.2
for the most part, with only a small amount of extra content, which is still under construction.Then it should be mentioned that basically all the
.inc
is generated using the modifiedllvm-tblgen
from https://github.com/Rot127/llvm-capstone/tree/auto-sync-tblgen, except forTriCoreGenDisassemblerTables.inc
, which modified a small part ofDecodeInstruction
andDecodeToMCInst
TODO: